共 7 条
- [1] Novel On-Chip Variable Delay Transmission Line with Fixed Characteristic Impedance 2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, : 1948 - 1952
- [2] Analysis and Measurement of a Novel On-Chip Variable Delay Transmission Line with Fixed Characteristic Impedance 2010 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, 2010, : 220 - 223
- [3] The closed environment concept in VLSI on-chip transmission lines design and modeling 10TH IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS, PROCEEDINGS, 2006, : 201 - +
- [4] Modeling capacitance of on-chip coplanar transmission lines over the silicon substrate SIGNAL PROPAGATION ON INTERCONNECTS, PROCEEDINGS, 2004, : 117 - 120
- [5] Low-power design of CML driver for on-chip transmission-lines using impedance-unmatched driver IEICE TRANSACTIONS ON ELECTRONICS, 2007, E90C (06): : 1274 - 1281
- [7] Experimental Study on Transition Loss of on-chip SIW Interconnects and Transmission Lines using Two De-embedding Reference Planes in 200 GHz Band Frequency 2024 IEEE/MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM, IMS 2024, 2024, : 694 - 697