Investigation on ESD Robustness of 1200-V D-Mode GaN MIS-HEMTs with HBM ESD Test and TLP Measurement

被引:5
作者
Ke, Chao-Yang [1 ]
Wang, Wei-Cheng [1 ]
Ker, Ming-Dou [1 ]
Yang, Chih-Yi [2 ]
Chang, Edward Yi [2 ]
机构
[1] Natl Yang Ming Chiao Tung Univ, Inst Elect, Hsinchu, Taiwan
[2] Natl Yang Ming Chiao Tung Univ, Int Coll Semicond Technol, Hsinchu, Taiwan
来源
2023 INTERNATIONAL VLSI SYMPOSIUM ON TECHNOLOGY, SYSTEMS AND APPLICATIONS, VLSI-TSA/VLSI-DAT | 2023年
关键词
FAILURE;
D O I
10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134426
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The component-level ESD robustness of 1200-V D-Mode (depletion-mode) GaN (gallium nitride) MIS-HEMTs (metal insulator semiconductor-high electron mobility transistor) was investigated in this work. Experimental results showed that HBM levels were poor in the testing condition with HBM ESD zapping from Gate to Source, even if the device size was as large as 120000 mu m. Further studies on the correlation between TLP failure currents and HBM ESD levels were conducted. It was found that HBM ESD test was the suitable method to evaluate the ESD immunity instead of TLP measurement owing to the miscorrelation between TLP failure currents and HBM ESD levels.
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页数:2
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