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- [1] Making Sense of Using a SmartNIC to Reduce Datacenter Tax from SLO and TCO Perspectives 2023 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION, IISWC, 2023, : 28 - 42
- [2] Exploiting Data Locality in Memory for ORAM to Reduce Memory Access Overheads PROCEEDINGS OF THE 59TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, DAC 2022, 2022, : 703 - 708
- [3] Exploiting frequency correlation in LTE to reduce HARQ memory 2012 IEEE GLOBAL COMMUNICATIONS CONFERENCE (GLOBECOM), 2012, : 4804 - 4809
- [4] Exploiting an infrastructure IP to reduce memory diagnosis costs in SoCs ETS 2005:10TH IEEE EUROPEAN TEST SYMPOSIUM, PROCEEDINGS, 2005, : 202 - 207
- [5] Exploiting the locality of memory references to reduce the address bus energy 1997 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, PROCEEDINGS, 1997, : 202 - 207
- [6] Exploiting Program Cyclic Behavior to Reduce Memory Latency in Embedded Processors APPLIED COMPUTING 2008, VOLS 1-3, 2008, : 1482 - 1486
- [7] Exploiting stability to reduce time-space cost for memory tracing COMPUTATIONAL SICENCE - ICCS 2003, PT III, PROCEEDINGS, 2003, 2659 : 966 - 975
- [8] Exploiting Storage Class Memory to Reduce Energy Consumption in Mobile Multimedia Devices 2010 DIGEST OF TECHNICAL PAPERS INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS ICCE, 2010,
- [9] Exploiting k-constraints to reduce memory overhead in continuous queries over data streams ACM TRANSACTIONS ON DATABASE SYSTEMS, 2004, 29 (03): : 545 - 580
- [10] Pin or Fuse? Exploiting Scratchpad Memory to Reduce Off-Chip Data Transfer in DNN Accelerators PROCEEDINGS OF THE 21ST ACM/IEEE INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION, CGO 2023, 2023, : 224 - 235