Lowering the cost of quantum comparator circuits

被引:2
作者
Donaire, Laura M. [1 ]
Ortega, Gloria [1 ]
Garzon, Ester M. [1 ]
Orts, Francisco [2 ]
机构
[1] Univ Almeria, Informat Dept, CeiA3, Almeria, Spain
[2] Vilnius Univ, Inst Data Sci & Digital Technol, Vilnius, Lithuania
关键词
Quantum circuits; Quantum comparators; Quantum computing; Fault tolerance; T-count;
D O I
10.1007/s11227-024-05959-4
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Quantum comparators hold substantial significance in the scientific community as fundamental components in a wide array of algorithms. In this research, we present an innovative approach where we explore the realm of comparator circuits, specifically focussing on three distinct circuit designs present in the literature. These circuits are notable for their use of T-gates, which have gained significant attention in circuit design due to their ability to enable the utilisation of error-correcting codes. However, it is important to note that T-gates come at a considerable computational cost. One of the key contributions of our work is the optimisation of the quantum gates used within these circuits. We articulate the proposed circuits employing Clifford+T gates, facilitating error correction code implementation. Additionally, we minimise T-gate usage, thereby reducing computational costs and fortifying circuit robustness against errors and environmental disturbances-essential for mitigating the effects of internal and external noise. Our methodology employs a bottom-up examination of comparator circuits, initiating with a detailed study of their gates. Subsequently, we systematically dissect the functions of these gates, thereby advancing towards a comprehensive understanding of the circuit's overall functionality. This meticulous examination forms the foundation of our research, enabling us to identify areas where optimisations can be made to improve their performance.
引用
收藏
页码:13900 / 13917
页数:18
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