K-band CMOS voltage-controlled oscillator using tail current modulation with half-output frequency

被引:0
|
作者
Son, Hyeon Jin [1 ]
Choi, Ui-Gyu [1 ]
Yang, Jong-Ryul [1 ]
机构
[1] Konkuk Univ, Dept Elect & Elect Engn, 120 Neungdong Ro, Seoul 05029, South Korea
关键词
Current-mode logic divider; Half-frequency feedback; Switched biasing; Tail current modulation; Voltage-controlled oscillator; PHASE-NOISE; REDUCTION; VCO;
D O I
10.1016/j.aeue.2023.155101
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A CMOS voltage-controlled oscillator (VCO) using half-oscillation frequency signals as switched biasing is proposed to simultaneously improve the phase noise and DC-to-RF conversion efficiency. The effect of the flicker noise caused by the tail current source, which is the dominant factor of the VCO phase noise, can be reduced by the modulation using the half-frequency signals of the output. The conversion efficiency of the proposed VCO is improved by the leakage of the second harmonics of the modulation signal at the drain node of the current source, which is the same as the oscillation frequency of the VCO, thereby increasing the output power. The differential half-frequency signals are generated in the frequency divider, designed with the current-mode logic for minimizing the effect of parasitic components at high-frequency operation, which constitutes the frequency synthesizer without any additional circuits. The proposed VCO with the divider was fabricated on the size of 0.4 x 0.61 mm2 using a 65-nm CMOS process, including all pads. The measurement results showed a tuning range of 11.2% at the K -band and a phase noise of -109.86 dBc/Hz at the 1-MHz offset. The peak output power and DC-toRF efficiency were measured to be 0.95 dBm and 16.64%, respectively, at the supply voltage of 1.2 V. A figure of merit of the proposed VCO was calculated to be -188.03 dBc/Hz.
引用
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页数:7
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