Efficient Implementation of a Genetic Algorithm for the Capacitated Vehicle Routing Problem on a High-Performance FPGA
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作者:
Heer, Maximilian Jakob
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机构:
Univ Rhode Isl, Coll Engn, Kingston, RI 02881 USAUniv Rhode Isl, Coll Engn, Kingston, RI 02881 USA
Heer, Maximilian Jakob
[1
]
Quevedo, Jose
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机构:
Univ Rhode Isl, Coll Engn, Kingston, RI 02881 USAUniv Rhode Isl, Coll Engn, Kingston, RI 02881 USA
Quevedo, Jose
[1
]
Abdelatti, Marwan F.
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机构:
Univ Rhode Isl, Coll Engn, Kingston, RI 02881 USAUniv Rhode Isl, Coll Engn, Kingston, RI 02881 USA
Abdelatti, Marwan F.
[1
]
Sendag, Resit
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机构:
Univ Rhode Isl, Coll Engn, Kingston, RI 02881 USAUniv Rhode Isl, Coll Engn, Kingston, RI 02881 USA
Sendag, Resit
[1
]
Sodhi, Manbir
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h-index: 0
机构:
Univ Rhode Isl, Coll Engn, Kingston, RI 02881 USAUniv Rhode Isl, Coll Engn, Kingston, RI 02881 USA
Sodhi, Manbir
[1
]
机构:
[1] Univ Rhode Isl, Coll Engn, Kingston, RI 02881 USA
来源:
2023 IEEE 31ST ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, FCCM
|
2023年
关键词:
D O I:
10.1109/FCCM57271.2023.00033
中图分类号:
TP3 [计算技术、计算机技术];
学科分类号:
0812 ;
摘要:
The Capacitated Vehicle Routing Problem (CVRP) is one of the most relevant optimization problems in operations research and logistics nowadays. While current state-of-the-art solutions to this problem implement evolutionary approaches such as Genetic Algorithms (GAs) on GPUs and multi-core CPUs, this work focuses on implementing a GA for CVRP on a high-performance FPGA to achieve an improved calculation efficiency: While maintaining a comparable solution quality and speed, the FPGA consumes only a fraction of the energy required by traditional computing platforms. This is achieved through leveraging algorithmic parallelism by a custom-fitted hardware architecture, combined with customized data representation for efficient processing.