Novel measurement method to estimate the main resonance of a Power Distribution Network

This paper presents an efficient method to measure the resonance frequency of the Power Distribution Network (PDN) of a microcontroller (MCU). The resonance occurring between the die capacitance and the system parasitic inductance can lead to critical supply voltage variations, and even system failure. Using common measurement instrumentation and the system main phased-lock loop (PLL), the method introduced allows to efficiently estimate the PDN resonance frequency of a commercial MCU. The proposed method is validated in two steps. The first step consists in applying the method to an existing microcontroller and comparing the outcome to a previously validated approach. The second step allows to verify the measurement setup, using a precise current probe to measure the CPU activity.