Optimal Weight Models for Ferroelectric Synapses Toward Neuromorphic Computing

被引:5
作者
Lu, Tian [1 ]
Zhao, Xiaoyue [1 ]
Liu, Houfang [1 ]
Yan, Zhaoyi [1 ]
Zhao, Ruiting [1 ]
Shao, Minghao [1 ]
Yan, Jianlan [1 ]
Yang, Mingdong [1 ]
Yang, Yi [1 ]
Ren, Tian-Ling [1 ]
机构
[1] Tsinghua Univ, Beijing Natl Res Ctr Informat Sci & Technol, Sch Integrated Circuits, Beijing 100084, Peoples R China
基金
中国国家自然科学基金;
关键词
FeFETs; Computational modeling; Synapses; Logic gates; Voltage measurement; Neuromorphic engineering; Temperature measurement; Ferroelectric synaptic transistor; metal-ferroelectric-metal-insulator-semiconductor (MFMIS); neuromorphic computing; Index Terms; symmetric nonlinearity model; weight model;
D O I
10.1109/TED.2023.3253466
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Ferroelectric field effect transistors (FeFETs) as artificial synapses have attracted great interests in neuromorphic computing. To enable the applications, the electrical response of FeFETs is required to map into the neural network via a weight model. However, the mapping strategy is less studied. Herein, we put forth an alternative symmetric nonlinearity model (S-N model) to map the symmetric conductance response of FeFETs. Based on the finely tuned metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structures, FeFETs achieve nearly 7-bit states with G(max)/G(min) over 10(3) when applied with 40-ns-width incremental amplitude pulses. By invoking the proposed S-N model, global states of raw conductance are fully accessed without any loss. Comparing with the conventional asymmetric nonlinearity model (A-N model), the optimized mapping method helps deep neural network (DNN) to implement a higher recognition accuracy of 94.1% (with cycle-to-cycle variation similar to 1.79%). These results offer a modeling perspective for promoting the realization of FeFETs-based high-density and efficient neuromorphic systems.
引用
收藏
页码:2297 / 2303
页数:7
相关论文
共 26 条
  • [1] Agarwal S, 2016, IEEE IJCNN, P929, DOI 10.1109/IJCNN.2016.7727298
  • [2] Scaled, Ferroelectric Memristive Synapse for Back-End-of-Line Integration with Neuromorphic Hardware
    Begon-Lours, Laura
    Halter, Mattia
    Puglisi, Francesco Maria
    Benatti, Lorenzo
    Falcone, Donato Francesco
    Popoff, Youri
    Davila Pineda, Diana
    Sousa, Marilyne
    Offrein, Bert Jan
    [J]. ADVANCED ELECTRONIC MATERIALS, 2022, 8 (06)
  • [3] Enhanced ferroelectricity in ultrathin films grown directly on silicon
    Cheema, Suraj S.
    Kwon, Daewoong
    Shanker, Nirmaan
    dos Reis, Roberto
    Hsu, Shang-Lin
    Xiao, Jun
    Zhang, Haigang
    Wagner, Ryan
    Datar, Adhiraj
    McCarter, Margaret R.
    Serrao, Claudy R.
    Yadav, Ajay K.
    Karbasian, Golnaz
    Hsu, Cheng-Hsiang
    Tan, Ava J.
    Wang, Li-Chen
    Thakare, Vishal
    Zhang, Xiang
    Mehta, Apurva
    Karapetrova, Evguenia
    Chopdekar, Rajesh, V
    Shafer, Padraic
    Arenholz, Elke
    Hu, Chenming
    Proksch, Roger
    Ramesh, Ramamoorthy
    Ciston, Jim
    Salahuddin, Sayeef
    [J]. NATURE, 2020, 580 (7804) : 478 - +
  • [4] Technological Benchmark of Analog Synaptic Devices for Neuroinspired Architectures
    Chen, Pai-Yu
    Yu, Shimeng
    [J]. IEEE DESIGN & TEST, 2019, 36 (03) : 31 - 38
  • [5] NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning
    Chen, Pai-Yu
    Peng, Xiaochen
    Yu, Shimeng
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 37 (12) : 3067 - 3080
  • [6] 28 nm HKMG-Based Current Limited FeFET Crossbar-Array for Inference Application
    De, Sourav
    Mueller, Franz
    Thunder, Sunanda
    Abdulazhanov, Sukhrob
    Laleni, Nellie
    Lederer, Maximilian
    Ali, Tarek
    Raffel, Yannick
    Duenkel, Stefan
    Mojumder, Shaown
    Vardar, Alptekin
    Beyer, Sven
    Seidel, Konrad
    Kaempfe, Thomas
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (12) : 7194 - 7198
  • [7] Multifunctional MoTe2 Fe-FET Enabled by Ferroelectric Polarization-Assisted Charge Trapping
    Gao, Jing
    Lian, Xu
    Chen, Zhixian
    Shi, Shu
    Li, Enlong
    Wang, Yanan
    Jin, Tengyu
    Chen, Huipeng
    Liu, Lei
    Chen, Jingsheng
    Zhu, Yao
    Chen, Wei
    [J]. ADVANCED FUNCTIONAL MATERIALS, 2022, 32 (17)
  • [8] Jerry Matthew, 2017, 2017 IEEE International Electron Devices Meeting (IEDM), P621, DOI 10.1109/IEDM.2017.8268338
  • [9] Analog Synaptic Transistor with Al-Doped HfO2 Ferroelectric Thin Film
    Kim, Duho
    Jeon, Yu-Rim
    Ku, Boncheol
    Chung, Chulwon
    Kim, Tae Heun
    Yang, Sanghyeok
    Won, Uiyeon
    Jeong, Taeho
    Choi, Changhwan
    [J]. ACS APPLIED MATERIALS & INTERFACES, 2021, 13 (44) : 52743 - 52753
  • [10] CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks
    Kim, Min-Kyu
    Kim, Ik-Jyae
    Lee, Jang-Sik
    [J]. SCIENCE ADVANCES, 2022, 8 (14)