Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design

Memories play an essential role in computer systems as they store and retrieve data that may include instructions required for system operation. In the case of an assembler, the memory stores instructions such as the Opcode table (OPTAB), which contains the instructions in the form of machine language to implement the desired program. A search operation is required for the Opcode table to obtain the desired instruction. To improve the speed of search operations and overall system efficiency, there are various search operation algorithms and techniques available, including linear, binary, and hashing algorithms. However, they all share one critical aspect which is they rely on software-based techniques that counter difficulties with the von Neumann Model. In this paper, we introduce a hardware-based approach to enhance the search operation for OPTAB in assemblers, which is usually performed using software-based techniques. Our proposed method involves replacing the conventional Random Access Memory (RAM) with Binary Content-Addressable Memory (BiCAM), which enables parallel search operation within a single clock cycle. To demonstrate the effectiveness of our approach, we utilize the BZK.SAU.FPGA assembler as a case study. We provide a comparison of our proposed method with the RAM-based searching algorithm used in BZK.SAU.FPGA assembler. Time complexity analysis and a comparison of resource utilization and power efficiency are provided. Our results showed that the proposed method has a fixed time complexity of O(1) under all conditions, regardless of memory size or input size. An increase in both resource utilization and power efficiency has been observed in the BiCAM due to its hardware structure. However, it could still be considered a reasonable trade-off for time-sensitive applications.