Optimal Design of Voltage Reference Circuit and Ring Oscillator Circuit Using Multiobjective Differential Evolution Algorithm

被引:1
|
作者
Dash, Sandeep K. [1 ]
De, Bishnu Prasad [1 ]
Samanta, Pravin K. [1 ]
Appasani, Bhargav [1 ]
Kar, Rajib [2 ]
Mandal, Durbadal [2 ]
Bizon, Nicu [3 ,4 ,5 ]
机构
[1] KIIT Univ, Sch Elect Engn, Bhubaneswar 751024, Orissa, India
[2] NIT Durgapur, Dept Elect & Commun Engn, Durgapur 713209, W Bengal, India
[3] Univ Pitesti, Fac Elect Commun & Comp, Pitesti 110040, Romania
[4] Univ Politehn Bucuresti, Splaiul Independentei St 313, Bucharest 060042, Romania
[5] Natl Res & Dev Inst Cryogen & Isotop Technol, ICSI Energy, Ramnicu Valcea 240050, Romania
关键词
OP-AMP; OPTIMIZATION;
D O I
10.1155/2023/7621594
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper deals with the optimal design of different VLSI circuits, namely, the CMOS voltage reference circuit and the CMOS ring oscillator (RO). The optimization technique used here is the multiobjective differential evolution algorithm (MDEA). All the circuits are designed for 90 nm technology. The main objective of the CMOS voltage reference circuit is to minimize the voltage variation at the output. The targeted value of the reference voltage is 550 mV. A CMOS ring oscillator (RO) is designed depending on the performance parameters such as power consumption and phase noise. The optimal transistor sizing of each circuit is obtained from MDEA. Each circuit is implemented in SPICE by taking the optimal dimensions of the transistors, and the performance parameters are achieved. The designed voltage reference circuit achieves a reference voltage of 550 mV with 600 nW power dissipation. The reference voltage variation of 8.18% is observed due to temperature variation from -40 & DEG;C to + 125 & DEG;C. The MDEA-based optimal design of RO oscillates at 2.001 GHz frequency, has a phase noise of -87 dBc/Hz at 1 MHz offset frequency, and consumes 71 & mu;W power. This work mainly aims to optimize the MOS transistors' sizes using MDEA for better circuit performance parameters. SPICE simulation has been carried out by using the optimal values of MOS transistor sizes to exhibit the performance parameters of the circuit. Simulation results establish that design specifications are closely met. SPICE results show that MDEA is a better technique for the optimal design of the above-mentioned VLSI circuits.
引用
收藏
页数:11
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