Design and analysis of all optical header recognition system employing combination of carrier reservoir SOA and conventional SOA

被引:11
作者
Agarwal, Vipul [1 ]
Pareek, Prakash [2 ]
Singh, Lokendra [1 ]
Balaji, Bukya [1 ]
Dakua, Pratap Kumar [3 ]
Chaurasia, Vijayshri [4 ]
机构
[1] Koneru Lakshmaiah Educ Fdn, Vaddeswaram, Andhra Pradesh, India
[2] Vishnu Inst Technol, Bhimavaram, Andhra Pradesh, India
[3] Vignans Inst Informat Technol A, Visakhapatnam 530049, Andhra Pradesh, India
[4] Maulana Azad Natl Inst Technol, Bhopal, Madhya Pradesh, India
关键词
Carrier reservoir semiconductor optical amplifier; Conventional semiconductor optical amplifier; Header recognition system; AND gate; CROSS-PHASE MODULATION; PATTERN-RECOGNITION; AMPLIFIER; XOR; DYNAMICS; GAIN;
D O I
10.1007/s11082-023-05657-0
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In optical networks, header recognition systems (HRS) plays an important role in matching the incoming bits with local address. Conventional HRS is designed using XNOR gate followed by AND gate. AND gate operation further requires a wavelength converter and start bit generator for synchronization of XNOR with AND gate. In this paper, for the first time, 4 bit header recognition system, is presented using carrier reservoir semiconductor optical amplifier (SOA) based XNOR gate and conventional semiconductor optical amplifier (SOA) at 100 Gb/s. AND gate, wavelength converter, and start bit generator are replaced by conventional SOA by exploiting its slow gain recovery leading to gradual pulse power reduction, to detect bit pattern 1111 which denotes matching of input bits with local address. The unique sequence of 1111 will cause gain saturation in conventional SOA hence the fourth bit will be least amplified, therefore power of fourth bit will be used to determine match/mismatch case. The proposed scheme offers several advantages such as simpler design, require less number of active elements, reduced power consumption and processing time. Header recognition operation has been assessed and evaluated by various performance parameters such as quality factor, extinction ratio, eye opening factor. Obtained quality factor is further examined against critical parameters such as amplifier noise, data rate, transition time of carriers from CR to AR, population inversion factor, etc. The results demonstrate that the proposed HRS can perform pattern matching without AND gate at 100 Gb/s with accepstable performance parameters.
引用
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页数:24
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