Characterizing and Modeling RTN Under Real Circuit Bias Conditions

Random telegraph noise (RTN) has attracted much attention, as it becomes higher for smaller devices. Early works focused on RTN in linear drain current, I-D,I-LIN, and there is only limited information on RTN in saturation current, I-D,I-SAT. As transistors can operate in either linear or saturation modes, lack of RTN model in I-D,I- SAT prevents modeling RTN for real circuit operation. Moreover, circuit simulation requires both driving current and threshold voltage, V-TH. A common practice of early works is to evaluate the RTN in V-TH by Delta V-TH = Delta(ID,LIN)/g(m), where gm is the transconductance. It has been reported that the Delta V-TH evaluated in this way significantly overestimates the real Delta V-TH, but there is little data for establishing the cumulative distribution function (CDF) of the real Delta V-TH. An open question is whether Delta V-TH and Delta I-D,I-LIN/I-D,I- LIN follow the same CDF. The objectives of this work are threefold: to provide statistical test data for RTN in I-D,I-SAT; to measure the RTN in real Delta V-TH by pulse I-D-V-G; and, for the first time, to apply the integral methodology for developing the CDF per trap for all four key parameters needed by circuit simulation-Delta I-D,I-LIN/I-D,I-LIN, Delta I-D,I-SAT/I-D,I-SAT, Delta V-TH,V-LIN, and Delta V-TH,SAT. It is found that the log-normal CDF is the best for Delta I-D,I-LIN/I-D,I- LIN and Delta I-D,I-SAT/I-D,I-SAT, while the general extreme value CDF is the best for Delta V-TH,V- LIN and Delta V-TH,V-SAT. Both Delta I-D,I-SAT/I-D,I- SAT and Delta V-TH,V- SAT are higher than their linear counterparts and separate modeling is required. Finally, the applicability of integral methodology in predicting the long term Delta I-D,I-LIN/I-D,I- LIN is demonstrated.