Cycle-to-Cycle Variation Suppression in ReRAM-Based AI Accelerators

被引：1

作者：

Fu, Jingyan ^{[1
]}

Liao, Zhiheng ^{[1
]}

Wang, Jinhui ^{[2
]}

机构：

[1] North Dakota State Univ, Elect & Comp Engn, Fargo, ND 58105 USA

[2] Univ S Alabama, Elect & Comp Engn, Mobile, AL USA

来源：

2023 IEEE PHYSICAL ASSURANCE AND INSPECTION OF ELECTRONICS, PAINE | 2023年

基金：

美国国家科学基金会;

关键词：

cycle-to-cycle variation; ReRAM (Resistive Random Access Memory); artificial intelligence; level; pulse; accuracy; energy; latency; MEMRISTOR; PERFORMANCE;

D O I：

10.1109/PAINE58317.2023.10317995

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

As a non-volatile memory, currently ReRAM (Resistive Random Access Memory) is emerging for the low power and high performance AI accelerator design. However, ReRAM always suffer from significant cycle-to-cycle variations, which significantly degrades the inference accuracy. In this study, we firstly fabricate ReRAM wafers and test them. Then we propose both level optimization and pulse regulation methods to mitigate the adverse impact of cycle-to-cycle variations of ReRAM, improve the inference accuracy, lower the energy consumption, and decrease the latency of the AI accelerators.

引用

页码：47 / 52

页数：6

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