AC Power Cycling Test Setup and Condition Monitoring Tools for SiC-Based Traction Inverters

被引:9
作者
Farhadi, Masoud [1 ]
Vankayalapati, Bhanu Teja [2 ]
Sajadi, Rahman [1 ]
Akin, Bilal [1 ]
机构
[1] Univ Texas Dallas, Dept Elect & Comp Engn, Dallas, TX 75080 USA
[2] Texas Instruments Inc, Dallas, TX 75243 USA
关键词
EV; electric vehicle; gate-oxide degradation; on-resistance monitoring; package degradation; power cycling test; power train; reliability; silicon carbide (SiC); threshold voltage measurement; JUNCTION TEMPERATURE-MEASUREMENT; SENSITIVE ELECTRICAL PARAMETERS; GATE-OXIDE DEGRADATION; TURN-ON DELAY; RELIABILITY EVALUATION; SWITCHING RATE; MOSFETS; CIRCUIT; IMPACT; ROBUSTNESS;
D O I
10.1109/TVT.2023.3271251
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
AC power cycling tests allow the most realistic reliability assessment by applying close to real stress to the device or module under test to meet functional safety standards, which is highly critical for traction applications. This article presents a comprehensive guideline and shares critical know-how to develop a 120 KVA AC power cycling test setup for high-power Silicon Carbide (SiC) modules. As of today, traction applications can not generate an early warning signal for drivers to replace critical components on time. For this purpose, the suitable precursors for all dominant failure mechanisms are discussed, and the corresponding condition monitoring tools are proposed to monitor the device aging on power converters. These condition monitoring tools are integrated into the built-in desaturation protection circuit of the electric vehicle (EV) gate driver for low-cost, practical implementation. The on-resistance of all twelve switches is monitored online as a temperature-sensitive electrical parameter (TSEP) to measure the junction temperature of the devices. To avoid heavy processing load in the microcontroller, the out-of-order equivalent time sampling technique is developed for data sampling, which leads to a measurement error of less than 1.5%. In addition, the design considerations regarding common mode noise and aging effect on DESAT protection are investigated, and experimental findings are presented.
引用
收藏
页码:12728 / 12743
页数:16
相关论文
共 100 条
  • [1] Afanas'ev VV, 1997, PHYS STATUS SOLIDI A, V162, P321, DOI 10.1002/1521-396X(199707)162:1<321::AID-PSSA321>3.0.CO
  • [2] 2-F
  • [3] Threshold voltage peculiarities and bias temperature instabilities of SiC MOSFETs
    Aichinger, Thomas
    Rescher, Gerald
    Pobegen, Gregor
    [J]. MICROELECTRONICS RELIABILITY, 2018, 80 : 68 - 78
  • [4] A Simple Plug-In Circuit for IGBT Gate Drivers to Monitor Device Aging Toward smart gate drivers
    Ali, Syed Huzaif
    Li, Xiong
    Kamath, Anant S.
    Akin, Bilal
    [J]. IEEE POWER ELECTRONICS MAGAZINE, 2018, 5 (03): : 45 - 55
  • [5] Impact of active thermal management on power electronics design
    Andresen, M.
    Liserre, M.
    [J]. MICROELECTRONICS RELIABILITY, 2014, 54 (9-10) : 1935 - 1939
  • [6] [Anonymous], 2010, JEDEC Standard JESD22-A108D
  • [7] [Anonymous], 2019, ECPE Guideline AQG 324
  • [8] SiC MOSFETs robustness for diode-less applications
    Avino-Salvado, O.
    Cheng, C.
    Buttay, C.
    Morel, H.
    Labrousse, D.
    Lefebvre, S.
    Ali, M.
    [J]. EPE JOURNAL, 2018, 28 (03) : 128 - 135
  • [9] Baker N, 2015, APPL POWER ELECT CO, P1270, DOI 10.1109/APEC.2015.7104511
  • [10] Bayerer R., 2008, P 5 INT C INT POW EL, P1