A low jitter 50 Gb/s PAM4 optical receiver in 130 nm SiGe BiCMOS

被引：2

作者：

Lu, Shaorong ^{[1
]}

Xie, Sheng ^{[1
]}

Mao, Luhong ^{[2
]}

Song, Ruiliang ^{[3
]}

Zhang, Naibo ^{[3
]}

机构：

[1] Tianjin Univ, Sch Microelect, Tianjin Key Lab Imaging & Sensing Microelect Techn, Tianjin 300072, Peoples R China

[2] Tianjin Univ, Sch Elect & Informat Engn, Tianjin 300072, Peoples R China

[3] China Elect Technol Grp Corp, Res Inst 54, Beijing 100070, Peoples R China

来源：

MICROELECTRONICS JOURNAL | 2023年 / 136卷

基金：

美国国家科学基金会;

关键词：

Optical receiver; Four-level pulse amplitude modulation; Phase jitter; Decode; DESIGN; AMPLIFIER; CMOS;

D O I：

10.1016/j.mejo.2023.105803

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper analyzed the causes of phase jitter in four-level pulse amplitude modulation (PAM4) optical receiver (ORX), and a modified architecture was proposed. An optimized shunt-feedback transimpedance amplifier was employed to suppress the random jitter caused by the noise of analog front-end, a three-lane limiting amplifier with inter-stage feedback was introduced to extend the bandwidth, and retimers aligning the edges of ther- mometer codes with an external clock were also incorporated. The ORX fabricated in 130 nm SiGe BiCMOS technology occupies an area of 1.125 mm2 while dissipating 630 mW. The preliminary measured results demonstrated that the phase jitter of the most significant bit (MSB) was less than 0.08 UI for 25 Gb/s NRZ data. Post-layout simulation results indicate that our ORX can correctly decode 50 Gb/s PAM4 signal under a supply voltage of 3.3 V, and the peak-to-peak jitters for the MSB and the least significant bit (LSB) are only 1.5 ps and 2.9 ps, respectively.

引用

页数：10

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