A High-Performance and Energy-Efficient Ternary Multiplier Using CNTFETs

Internet-of-things-based embedded systems depend on batteries as an energy resource, and thus, require energy-efficient circuits for prolonged operation. To achieve energy-efficient designs, multiple-valued logic circuits and carbon nanotube field-effect transistors (CNTFETs) are used instead of binary logic circuits and complementary metal-oxide-semiconductor, respectively. This paper presents a novel high-performance and energy-efficient ternary multiplier (TMUL) circuit in CNTFET technology. The proposed TMUL is designed by modifying its truth table by including two ternary unary operator circuits, negative ternary inverter and positive ternary inverter, and finding relations between these operators and outputs to dump ternary decoders/encoders and basic logic gates. Moreover, two power supplies, V-DD and V-DD/2, are employed to eliminate the direct path from high to low voltage levels in each possible combination of inputs. Using ternary unary operator circuits and applying two power supply components reduce the number of transistors used, delay, and power/energy. The delay, power, and power-delay-product (PDP) of the proposed design at 0.9 V supply voltage are 0.048 ns, 0.172 mu W, and 0.008 pJ, respectively. The proposed TMUL offers an improvement between 8.70 and 71% in transistors count, between 11.11 and 81.54% in delay, between 6.52 and 72.74% in power consumption, and between 27.27 and 94.07% in PDP compared to the latest TMUL circuits.