Circuit fault detection model using multiclass support vector machine

被引:1
作者
Vijayalakshmi, T. [1 ]
Selvakumar, J. [1 ,2 ]
机构
[1] SRMIST, Dept Elect & Commun Engn, Chennai, India
[2] SRMIST, Dept Elect & Commun Engn, Chennai 603203, India
关键词
Fault identification; adiabatic adder; adaptive median filtering; GASIFT; multiclass support vector machine;
D O I
10.1080/00207217.2023.2267219
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Fault detection in a complex circuit is a tedious process, and it requires specialised manpower to detect and localise the faults. Manual detection is quite time consuming and might be wrong some times. Identification of faults automatically by analysing the circuit using transforms and machine learning algorithm is presented in this research work. A hardware model and a software model are developed to generate the test and train samples, and they are used in simulation analysis to detect the faults. A simple adiabatic adder using metal-oxide-semiconductor field-effect transistor is used in the hardware module, and multiple techniques like adaptive median filtering, Hilbert transform, geometric algebraic scale-invariant feature transform and multiclass support vector machine are used in the simulation model to detect the faults in the circuit. All the stages of simulation analysis results are presented to validate the performance of the proposed model. Normal and faulty conditions are accurately detected by the proposed model with maximum detection accuracy, which reduces the human efforts in designing and developing a circuit.
引用
收藏
页码:19 / 36
页数:18
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