Challenges in Design, Data Placement, Migration and Power-Performance Trade-offs in DRAM-NVM-based Hybrid Memory Systems

被引:1
作者
Rai, Sadhana [1 ]
Talawar, Basavaraj [1 ]
机构
[1] Natl Inst Technol Karnataka, Dept Comp Sci & Engn, Surathkal 575025, India
关键词
DRAM; Hybrid memory; Migration; NVM; Power; Performance; AWARE PAGE REPLACEMENT; MAIN MEMORY; MANAGEMENT; ENERGY; ALGORITHM; PCM; ALLOCATION; LIFETIME; POLICY;
D O I
10.1080/02564602.2022.2127945
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
DRAM-NVM-based hybrid memory opens up a varied range of power-performance-area operational configurations through page migration between the high-performance DRAM and the reliable NVM. The amalgamation of two technologies requires various modifications for the existing monolithic DRAM-based systems. This paper summarizes the current research work in the areas of data placement and page migration in hybrid memories. The challenges and design solutions from a range of NVMs-PCM, STT-RAM, ReRAM is presented. This paper also identifies several research challenges in these areas.
引用
收藏
页码:498 / 520
页数:23
相关论文
共 94 条
[1]   Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs [J].
Al-Ars, Z ;
van de Goor, AJ .
DESIGN, AUTOMATION AND TEST IN EUROPE, CONFERENCE AND EXHIBITION 2001, PROCEEDINGS, 2001, :496-503
[2]   Footprint-Aware Power Capping for Hybrid Memory Based Systems [J].
Arima, Eishi ;
Hanawa, Toshihiro ;
Trinitis, Carsten ;
Schulz, Martin .
HIGH PERFORMANCE COMPUTING, ISC HIGH PERFORMANCE 2020, 2020, 12151 :347-369
[3]  
Bo Wang, 2019, 2019 IEEE 21st International Conference on High Performance Computing and Communications
[4]  
IEEE 17th International Conference on Smart City
[5]  
IEEE 5th International Conference on Data Science and Systems (HPCC/SmartCity/DSS). Proceedings, P305, DOI 10.1109/HPCC/SmartCity/DSS.2019.00055
[6]  
Bock S, 2016, PR IEEE COMP DESIGN, P420, DOI 10.1109/ICCD.2016.7753318
[7]   DESIGNING EFFICIENT HETEROGENEOUS MEMORY ARCHITECTURES [J].
Bolotin, Evgeny ;
Nellans, David ;
Villa, Oreste ;
O'Connor, Mike ;
Ramirez, Alex ;
Keckler, Stephen W. .
IEEE MICRO, 2015, 35 (04) :60-68
[8]   Emerging NVM: A Survey on Architectural Integration and Research Challenges [J].
Boukhobza, Jalil ;
Rubini, Stephane ;
Chen, Renhai ;
Shao, Zili .
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2018, 23 (02)
[9]   A survey of operating system support for persistent memory [J].
Cai, Miao ;
Huang, Hao .
FRONTIERS OF COMPUTER SCIENCE, 2021, 15 (04)
[10]   A Novel Page Caching Policy for PCM and DRAM of Hybrid Memory Architecture [J].
Cai, Xiaojun ;
Ju, Lei ;
Zhao, Mengying ;
Sun, Zhiwen ;
Jia, Zhiping .
2016 13TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (ICESS) - PROCEEDINGS, 2016, :67-73