3-D imaging;
CMOS image sensors (CISs);
high dynamic range (HDR) imaging;
high-speed imaging systems;
CAMERA;
D O I:
10.1109/JSSC.2023.3275271
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
A dual-tap coded-exposure-pixel (CEP) image sensor is presented and validated in two computational imaging applications. The NMOS-only data-memory pixel (DMP) reduces the transistor count yielding a 7-mu m pitch. One frame period can include up to 900 subexposures when operating at 30 frames/s, corresponding to 39 000 coded subexposures/s. The 320 x 320-pixel sensor features two readout modes using column-parallel analog-to-digital converters (ADCs). ADC1 is a conventional high-accuracy Delta Sigma-modulated ADC that digitizes pixel voltage at the end of every frame period, and ADC2 is a fast energy-efficient comparator that compares the pixel voltage with a constant reference voltage during each subexposure. The outputs of the 12-bit frame-rate ADC1 and the 1-bit subexposure-rate ADC2 are adaptively combined to boost the native dynamic range of the uncoded pixel by over 57 dB, demonstrating over 101-dB dynamic range in intensity imaging. In the second demonstrated application, combined with machine-learned projected illumination patterns, the CEP camera enables single-shot structured-light 3-D imaging at the native resolution and the nominal 30 frames/s video rate.