Features like ultra-dense structure and ultra-low power consumption of the quantum-dot cellular automata (QCA) have made this nanotechnology a viable alternative to complementary metal-oxide-semiconductor (CMOS) technology. The arithmetic logic unit (ALU) is the fundamental and inseparable part of each processor. This paper presented a new reversible ALU which is made up of three Modified Fredkin (MF) gates and a novel coplanar reversible full adder relying on the HNG gate in QCA nanotechnology. This structure consists of 350 QCA cells are arranged in a 0.411 mu m(2) area and is implemented using the coplanar clock-zone-based crossover. Also, this layout can execute 20 distinctive arithmetic and logic functions, and its outputs are produced in three clock cycles (12 clock phases). The QCA implementation of the proposed structure is simulated and evaluated by QCADesigner version 2.0.3. Simulation outcomes authenticate that the proposed QCA reversible ALU has a 60.62%, 38.47%, 27.08%, 20%, and 14.28% amelioration in QCA cost, area occupancy, cell count, latency, and quantum cost, respectively, compared to the prior best coplanar structure.
机构:
Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USAUniv Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
Parhami, Behrooz
[J].
2006 FORTIETH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS, VOLS 1-5,
2006,
: 1726
-
1729
机构:
Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USAUniv Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
Parhami, Behrooz
[J].
2006 FORTIETH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS, VOLS 1-5,
2006,
: 1726
-
1729