Design of a reversible ALU using a novel coplanar reversible full adder and MF gate in QCA nanotechnology

被引:8
作者
Aliabadian, Ramin [1 ]
Golsorkhtabaramiri, Mehdi [1 ,2 ]
Heikalabad, Saeed Rasouli [1 ,3 ]
Sohrabi, Mohammad Karim [1 ]
机构
[1] Islamic Azad Univ, Dept Comp Engn, Semnan Branch, Semnan, Iran
[2] Islamic Azad Univ, Dept Comp Engn, Babol Branch, Babol, Iran
[3] Islamic Azad Univ, Ind Nanotechnol Res Ctr, Tabriz Branch, Tabriz, Iran
关键词
Arithmetic logic unit; Nanotechnology; QCA; Reversible logic; Full adder; DOT CELLULAR-AUTOMATA; 5-INPUT MAJORITY GATE; BISTABLE SATURATION; EFFICIENT DESIGN; MODULAR DESIGN; QUANTUM; REVOLUTION; SUBTRACTOR; LOGIC; ADDER/SUBTRACTOR;
D O I
10.1007/s11082-022-04382-4
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Features like ultra-dense structure and ultra-low power consumption of the quantum-dot cellular automata (QCA) have made this nanotechnology a viable alternative to complementary metal-oxide-semiconductor (CMOS) technology. The arithmetic logic unit (ALU) is the fundamental and inseparable part of each processor. This paper presented a new reversible ALU which is made up of three Modified Fredkin (MF) gates and a novel coplanar reversible full adder relying on the HNG gate in QCA nanotechnology. This structure consists of 350 QCA cells are arranged in a 0.411 mu m(2) area and is implemented using the coplanar clock-zone-based crossover. Also, this layout can execute 20 distinctive arithmetic and logic functions, and its outputs are produced in three clock cycles (12 clock phases). The QCA implementation of the proposed structure is simulated and evaluated by QCADesigner version 2.0.3. Simulation outcomes authenticate that the proposed QCA reversible ALU has a 60.62%, 38.47%, 27.08%, 20%, and 14.28% amelioration in QCA cost, area occupancy, cell count, latency, and quantum cost, respectively, compared to the prior best coplanar structure.
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页数:28
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共 76 条
  • [11] ELEMENTARY GATES FOR QUANTUM COMPUTATION
    BARENCO, A
    BENNETT, CH
    CLEVE, R
    DIVINCENZO, DP
    MARGOLUS, N
    SHOR, P
    SLEATOR, T
    SMOLIN, JA
    WEINFURTER, H
    [J]. PHYSICAL REVIEW A, 1995, 52 (05): : 3457 - 3467
  • [12] A Three-Layer Full Adder/Subtractor Structure in Quantum-Dot Cellular Automata
    Barughi, Yashar Zirak
    Heikalabad, Saeed Rasouli
    [J]. INTERNATIONAL JOURNAL OF THEORETICAL PHYSICS, 2017, 56 (09) : 2848 - 2858
  • [13] LOGICAL REVERSIBILITY OF COMPUTATION
    BENNETT, CH
    [J]. IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1973, 17 (06) : 525 - 532
  • [14] Design of Ultra-Efficient Reversible Gate Based 1-bit Full Adder in QCA with Power Dissipation Analysis
    Bhat, Soha Maqbool
    Ahmed, Suhaib
    [J]. INTERNATIONAL JOURNAL OF THEORETICAL PHYSICS, 2019, 58 (12) : 4042 - 4063
  • [15] Bhuvana B.P., 2018, INNOVATIONS ELECT CO, P111
  • [16] Modular Adder Designs Using Optimal Reversible and Fault Tolerant Gates in Field-Coupled QCA Nanocomputing
    Bilal, Bisma
    Ahmed, Suhaib
    Kakkar, Vipan
    [J]. INTERNATIONAL JOURNAL OF THEORETICAL PHYSICS, 2018, 57 (05) : 1356 - 1375
  • [17] Chaves JF, 2015, IEEE LAT AMER SYMP
  • [18] QUANTUM-MECHANICAL COMPUTERS
    FEYNMAN, RP
    [J]. FOUNDATIONS OF PHYSICS, 1986, 16 (06) : 507 - 531
  • [19] CONSERVATIVE LOGIC
    FREDKIN, E
    TOFFOLI, T
    [J]. INTERNATIONAL JOURNAL OF THEORETICAL PHYSICS, 1982, 21 (3-4) : 219 - 253
  • [20] Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic
    Goswami, Mrinal
    Sen, Bibhash
    Mukherjee, Rijoy
    Sikdar, Biplab K.
    [J]. MICROELECTRONICS JOURNAL, 2017, 60 : 1 - 12