ClaPIM: Scalable Sequence Classification Using Processing-in-Memory

被引:2
|
作者
Khalifa, Marcel [1 ]
Hoffer, Barak [1 ]
Leitersdorf, Orian [1 ]
Hanhan, Robert [1 ]
Perach, Ben [1 ]
Yavits, Leonid [2 ]
Kvatinsky, Shahar [1 ]
机构
[1] Technion Israel Inst Technol, Andrew & Erna Viterbi Fac Elect & Comp Engn, IL-3200003 Haifa, Israel
[2] Bar Ilan Univ, Alexander Kofkin Fac Engn, IL-5290002 Ramat Gan, Israel
基金
欧洲研究理事会;
关键词
Accelerator; approximate string matching; bioinformatics; deoxyribonucleic acid (DNA) classification; processing-in-memory (PIM);
D O I
10.1109/TVLSI.2023.3293038
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Deoxyribonucleic acid (DNA) sequence classification is a fundamental task in computational biology with vast implications for applications such as disease prevention and drug design. Therefore, fast high-quality sequence classifiers are significantly important. This article introduces ClaPIM, a scalable DNA sequence classification architecture based on the emerging concept of hybrid in-crossbar and near-crossbar memristive processing-in-memory (PIM). We enable efficient and high-quality classification by uniting the filter and search stages within a single algorithm. Specifically, we propose a custom filtering technique that drastically narrows the search space and a search approach that facilitates approximate string matching through a distance function. ClaPIM is the first PIM architecture for scalable approximate string matching that benefits from the high density of memristive crossbar arrays and the massive computational parallelism of PIM. Compared with Kraken2, a state-of-the-art software classifier, ClaPIM provides significantly higher classification quality (up to 20x improvement in F1 score) and also demonstrates a 1.8x throughput improvement. Compared with edit distance tolerant approximate matching (EDAM), a recently proposed static random-access memory (SRAM)-based accelerator that is restricted to small datasets, we observe both a 30.4x improvement in normalized throughput per area and a 7% increase in classification precision.
引用
收藏
页码:1347 / 1357
页数:11
相关论文
共 38 条
  • [1] A Customized Processing-in-Memory Architecture for Biological Sequence Alignment
    Akbari, Nasrin
    Modarressi, Mehdi
    Daneshtalab, Masoud
    Loni, Mohammad
    2018 IEEE 29TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP), 2018, : 158 - 165
  • [2] A Design Framework for Processing-In-Memory Accelerator
    Gao, Di
    Shen, Tianhao
    Zhuo, Cheng
    2018 ACM/IEEE INTERNATIONAL WORKSHOP ON SYSTEM LEVEL INTERCONNECT PREDICTION (SLIP), 2018,
  • [3] Machine Learning Training on a Real Processing-in-Memory System
    Gomez-Luna, Juan
    Guo, Yuxin
    Brocard, Sylvan
    Legriel, Julien
    Cimadomo, Remy
    Oliveira, Geraldo F.
    Singh, Gagandeep
    Mutlu, Onur
    2022 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2022), 2022, : 292 - 295
  • [4] Accelerating Graph Convolutional Networks Using Crossbar-based Processing-In-Memory Architectures
    Huang, Yu
    Zheng, Long
    Yao, Pengcheng
    Wang, Qinggang
    Liao, Xiaofei
    Jin, Hai
    Xue, Jingling
    2022 IEEE INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE (HPCA 2022), 2022, : 1029 - 1042
  • [5] Processing-in-Memory Technology for Machine Learning: From Basic to ASIC
    Taylor, Brady
    Zheng, Qilin
    Li, Ziru
    Li, Shiyu
    Chen, Yiran
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69 (06) : 2598 - 2603
  • [6] SpaceA: Sparse Matrix Vector Multiplication on Processing-in-Memory Accelerator
    Xie, Xinfeng
    Liang, Zheng
    Gu, Peng
    Basak, Abanti
    Deng, Lei
    Liang, Ling
    Hu, Xing
    Xie, Yuan
    2021 27TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE (HPCA 2021), 2021, : 570 - 583
  • [7] Evaluating Homomorphic Operations on a Real-World Processing-In-Memory System
    Gupta, Harshita
    Kabra, Mayank
    Gomez-Luna, Juan
    Kanellopoulos, Konstantinos
    Mutlu, Onur
    2023 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION, IISWC, 2023, : 211 - 215
  • [8] A High-Performance Processing-in-Memory Accelerator for Inline Data Deduplication
    Lee, Young Seo
    Kim, Kyung Min
    Lee, Ji Heon
    Choi, Jeong Hwan
    Chung, Sung Woo
    2019 IEEE 37TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2019), 2019, : 515 - 523
  • [9] Design of Synaptic Driving Circuit for TFT eFlash-Based Processing-In-Memory Hardware Using Hybrid Bonding
    Kim, Younghee
    Jin, Hongzhou
    Kim, Dohoon
    Ha, Panbong
    Park, Min-Kyu
    Hwang, Joon
    Lee, Jongho
    Woo, Jeong-Min
    Choi, Jiyeon
    Lee, Changhyuk
    Kwak, Joon Young
    Son, Hyunwoo
    ELECTRONICS, 2023, 12 (03)
  • [10] Scalable in-memory processing of omics workflows
    Elisseev, Vadim
    Gardiner, Laura-Jayne
    Krishna, Ritesh
    COMPUTATIONAL AND STRUCTURAL BIOTECHNOLOGY JOURNAL, 2022, 20 : 1914 - 1924