Steep-slope vertical-transport transistors built from sub-5 nm Thin van der Waals heterostructures

被引:13
作者
Yang, Qiyu [1 ]
Luo, Zheng-Dong [1 ,2 ]
Duan, Huali [3 ]
Gan, Xuetao [4 ,5 ]
Zhang, Dawei [6 ,7 ]
Li, Yuewen [2 ]
Tan, Dongxin [1 ]
Seidel, Jan [6 ,7 ]
Chen, Wenchao [3 ]
Liu, Yan [1 ,2 ]
Hao, Yue [1 ]
Han, Genquan [1 ,2 ]
机构
[1] Xidian Univ, Sch Microelect, State Key Discipline Lab Wide Band Gap Semicond Te, Xian 710071, Peoples R China
[2] Xidian Univ, Hangzhou Inst Technol, Hangzhou 311200, Peoples R China
[3] Zhejiang Univ, ZJU UIUC Inst, Int Campus, Haining 314400, Peoples R China
[4] Northwestern Polytech Univ, Sch Phys Sci & Technol, Key Lab Light Field Manipulat & Informat Acquisit, Minist Ind & Informat Technol, Xian 710129, Peoples R China
[5] Northwestern Polytech Univ, Sch Phys Sci & Technol, Shaanxi Key Lab Opt Informat Technol, Xian 710129, Peoples R China
[6] UNSW Sydney, Sch Mat Sci & Engn, Sydney, NSW 2052, Australia
[7] UNSW Sydney, ARC Ctr Excellence Future Low Energy Elect Technol, Sydney, NSW 2052, Australia
基金
澳大利亚研究理事会; 中国国家自然科学基金; 国家重点研发计划;
关键词
FIELD-EFFECT TRANSISTORS; NEGATIVE CAPACITANCE; GRAPHENE;
D O I
10.1038/s41467-024-45482-x
中图分类号
O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];
学科分类号
07 ; 0710 ; 09 ;
摘要
Two-dimensional (2D) semiconductor-based vertical-transport field-effect transistors (VTFETs) - in which the current flows perpendicularly to the substrate surface direction - are in the drive to surmount the stringent downscaling constraints faced by the conventional planar FETs. However, low-power device operation with a sub-60 mV/dec subthreshold swing (SS) at room temperature along with an ultra-scaled channel length remains challenging for 2D semiconductor-based VTFETs. Here, we report steep-slope VTFETs that combine a gate-controllable van der Waals heterojunction and a metal-filamentary threshold switch (TS), featuring a vertical transport channel thinner than 5 nm and sub-thermionic turn-on characteristics. The integrated TS-VTFETs were realised with efficient current switching behaviours, exhibiting a current modulation ratio exceeding 1 x 108 and an average sub-60 mV/dec SS over 6 decades of drain current. The proposed TS-VTFETs with excellent area- and energy-efficiency could help to tackle the performance degradation-device downscaling dilemma faced by logic transistor technologies. 2D vertical transport transistors (VTFETs) may promote the downscaling of electronic devices, but their performance is usually restricted by the thermionic limit. Here, the authors report the realization of short-channel steep-slope VTFETs based on MoS2/MoTe2 heterojunctions integrated with resistance threshold switching cells.
引用
收藏
页数:10
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