A Reliable 5G Stacked Power Amplifier in 45nm CMOS Technology

被引:1
|
作者
Ma, Zhize [1 ]
Mohammadi, Saeed [1 ]
机构
[1] Purdue Univ, Elmore Family Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
关键词
5G; aging; CMOS; RF Power Amplifier; Stacked transistors; Reliability;
D O I
10.1109/PAWR56957.2023.10046289
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A stacked transistor microwave power amplifier (PA) operating in fifth generation (5G) broadband cellular standard is presented. The PA is implemented using stack of six advanced NMOS transistors (ADNFETs with 32 nm length in a 45nm CMOS SOI technology) and using a dynamic biasing scheme from a single power supply VDD. The operation mode can be tuned from Class-AB to Class-A by simply adjusting the VDD. Under an applied VDD of 9V (1.5V per transistor) and operating frequency of 23 GHz, the maximum measured output power reaches 21.5 dBm. At a smaller power supply of 7V, the PAE peaks at 38.4%. The PA outputs more than 20 dBm of power from 22GHz to 27 GHz. The overall performance including estimated reliability characteristics is improved compared to a similar design in the same technology but with regular NFET transistors.
引用
收藏
页码:36 / 38
页数:3
相关论文
共 50 条
  • [41] Management of power and performance with stress memorization technique for 45nm CMOS
    Eiho, A.
    Sanuki, T.
    Morifuji, E.
    Iwamoto, T.
    Sudo, G.
    Fukasaku, K.
    Ota, K.
    Sawada, T.
    Fuji, O.
    Nii, H.
    Togo, M.
    Ohno, K.
    Yoshida, K.
    Tsuda, H.
    Ito, T.
    Shiozaki, Y.
    Fuji, N.
    Yamazaki, H.
    Nakazawa, M.
    Iwasa, S.
    Muramatsu, S.
    Nagaoka, K.
    Iwai, M.
    Ikeda, M.
    Saito, M.
    Naruse, H.
    Enomoto, Y.
    Kitano
    Yamada, S.
    Imai, K.
    Nagashima, N.
    Kuwata, T.
    Matsuoka, F.
    2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2007, : 218 - +
  • [42] A Compact, High-gain Q-Band Stacked Power Amplifier in 45nm SOI CMOS With 19.2dBm Psat and 19% PAE
    Tai, Wei
    Ricketts, David S.
    2015 IEEE TOPICAL CONFERENCE ON POWER AMPLIFIERS FOR WIRELESS AND RADIO APPLICATIONS (PAWR), 2015, : 34 - 36
  • [43] Bandpass Power Divider Design in Advanced 45nm CMOS Process
    Kou, Zhonghao
    Pei, Xiaoqing
    Zhou, Hang
    Wang, Xudong
    2024 INTERNATIONAL CONFERENCE ON MICROWAVE AND MILLIMETER WAVE TECHNOLOGY, ICMMT, 2024,
  • [44] A 0.65V Embedded SDRAM with Smart Boosting and Power Management in a 45nm CMOS Technology
    Pyo, Suk-Soo
    Kim, Jun-Sung
    Kim, Jung-Han
    Jung, Hyun-Taek
    Song, Tae-Joong
    Lee, Cheol-Ha
    Kim, Gyu-Hong
    Lee, Young-Keun
    Kim, Kee-Sup
    2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
  • [45] A Review on Leakage Power Reduction Techniques at 45nm Technology
    Kumar, N. Praveen
    Charles, B. Stephen
    Sumalatha, V.
    MATERIALS TODAY-PROCEEDINGS, 2015, 2 (09) : 4569 - 4574
  • [46] A Fully-Integrated 2.6GHz Stacked Switching Power Amplifier in 45nm SOI CMOS with >2W Output Power and 43.5% Efficiency
    Khorshidian, Mohammad
    Krishnaswamy, Harish
    2019 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS), 2019, : 323 - 326
  • [47] Activity Analysis at Low Power Supply on 45nm Technology
    Bascoul, Guillaume
    Perdu, Philippe
    Sanchez, Kevin
    Lewis, Dean
    Dudit, Sylvain
    Cell, Guillaume
    ISTFA 2011: CONFERENCE PROCEEDINGS FROM THE 37TH INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS, 2011, : 367 - 372
  • [48] 23-28 GHz Doherty Power Amplifier Using 28 nm CMOS for 5G Applications
    Choi, Young Chan
    Oh, Sungjae
    Yang, Youngoo
    2022 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT 2022), 2022, : 6 - 8
  • [49] 45nm CMOS platform technology (CMOS6) with high density embedded memories
    Iwai, M
    Oishi, A
    Sanuki, T
    Takegawa, Y
    Komoda, T
    Morimasa, Y
    Ishimaru, K
    Takayanagi, M
    Eguchi, K
    Matsushita, D
    Muraoka, K
    Sunouchi, K
    Noguchi, T
    2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2004, : 12 - 13
  • [50] High Performance Digital to Analog Converter Using CMOS 45nm Technology
    Raju, David Solomon Y.
    Shyamala, K.
    Sumalatha, Ch
    Sunilkumar, J.
    PROCEEDINGS OF THE 6TH INTERNATIONAL CONFERENCE ON INVENTIVE COMPUTATION TECHNOLOGIES (ICICT 2021), 2021, : 357 - 361