A Wide-Range Low-Power Thyristor-Based Delay Element With Improved Temperature Sensitivity

This brief describes an improved CMOS thyristor-based delay element (THDE) in which two current sources, digitally-controlled (DC) and voltage-controlled (VC), are implemented to demonstrate the design choice trade-offs and offer a wide range of delays. Both THDE designs show reduced temperature sensitivity while allowing an extended tuning range. Prototypes fabricated in a 0.35-mu m CMOS process exhibit measured delay range of 26 ns-4.5 mu s for DC-based delay element and 16 mu s-5 ms for VC-based delay element. At their maximum delay amounts, the integrated THDEs consume 4.1 and 1.58 mu W, respectively, from a 3.3-V supply. Also, the fabricated delay cells show a temperature sensitivity of 900 and 2710 ppm/degrees C, respectively, when operating at maximum delay.