Design for performance improvement via structure optimization and contact engineering in MoS2 FETs with 2 nm gate length

To provide theoretical designs for performance improvement, MoS2-based FETs with 2 nm gate length are investigated by numerical simulations. It is found that by optimizing structure with underlap (UL), off-current (I (off)) is suppressed by similar to 10(3) in MoS2 FETs. Contact engineering by H-passivation could modulate the Schottky barrier for higher on-current (I (on)) and lower subthreshold swing in Si-MoS2 FETs. More importantly, even in Si-MoS2 FETs with 2 nm gate length, similar to 10(7) I (on)/I (off) could be achieved by structure optimization to suppress I (off) and contact engineering to modulate the Schottky barrier. Our results are significant to guide designs of MoS2 integrations in ultimate-scaled technology.