Intellectual Property Protection of Deep-Learning Systems via Hardware/Software Co-Design

被引：1

作者：

Chen, Huili ^{[1
,5
]}

Fu, Cheng ^{[2
]}

Rouhani, Bita Darvish ^{[3
]}

Zhao, Jishen ^{[2
]}

Koushanfar, Farinaz ^{[4
]}

机构：

[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA

[2] Univ Calif San Diego, Comp Sci & Engn Dept, La Jolla, CA 92093 USA

[3] Microsoft, Redmond, WA 98052 USA

[4] Univ Calif San Diego, Elect & Comp Engn, La Jolla, CA 92093 USA

[5] Univ Calif San Diego, La Jolla, CA 92093 USA

来源：

IEEE DESIGN & TEST | 2024年 / 41卷 / 02期

关键词：

Hardware; Fingerprint recognition; Security; Watermarking; IP networks; Computational modeling; Performance evaluation; Intellectual property protection; Deep learning hardware; Attestation; Digital fingerprinting;

D O I：

10.1109/MDAT.2023.3303435

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Editor's notes: This article protects deep learning models by leveraging hardware device-specific model fingerprinting and trusted execution environment. - Gang Qu, University of Maryland, USA © 2013 IEEE.

引用

页码：23 / 31

页数：9

共 39 条

[31] Hopscotch: A Hardware-Software Co-Design for Efficient Cache Resizing on Multi-Core SoCs
Jiang, Zhe
Yang, Kecheng
Fisher, Nathan
Guan, Nan
Audsley, Neil C.
Dong, Zheng
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2024, 35 (01) : 89 - 104
[32] A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA
Paul, Bikram
Yadav, Tarun Kumar
Singh, Balbir
Krishnaswamy, Srinivasan
Trivedi, Gaurav
IEEE TRANSACTIONS ON COMPUTERS, 2023, 72 (05) : 1247 - 1260
[33] Towards An FPGA-targeted Hardware/Software Co-design Framework for CNN-based Edge Computing
Cuong Pham-Quoc
Xuan-Quang Nguyen
Tran Ngoc Thinh
MOBILE NETWORKS & APPLICATIONS, 2022, 27 (05) : 2024 - 2035
[34] Hardware Software Co-Design for Multi-Threaded Computation on RISC-V-Based Multicore System
Kieu-do-Nguyen, Binh
Nguyen, Khai-Duy
The Binh, Nguyen
Ma, Khai-Minh
Ta, Tri-Duc
Le, Duc-Hung
Pham, Cong-Kha
Hoang, Trong-Thuc
IEEE ACCESS, 2024, 12 : 177312 - 177326
[35] EyeCoD: Eye Tracking System Acceleration via FlatCam-Based Algorithm and Hardware Co-Design
You, Haoran
Zhao, Yang
Wan, Cheng
Yu, Zhongzhi
Fu, Yonggan
Yuan, Jiayi
Wu, Shang
Zhang, Shunyao
Zhang, Yongan
Li, Chaojian
Boominathan, Vivek
Veeraraghavan, Ashok
Li, Ziyun
Lin, Yingyan
IEEE MICRO, 2023, 43 (04) : 88 - 97
[36] The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System
Zheng, Xin
Xu, Chongyao
Hu, Xianghong
Zhang, Yun
Xiong, Xiaoming
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 39 (10) : 2055 - 2066
[37] Tetris: Using Software/Hardware Co-Design to Enable Handheld, Physics-Limited 3D Plane-Wave Ultrasound Imaging
West, Brendan L.
Zhou, Jian
Dreslinski, Ronald G.
Kripfgans, Oliver D.
Fowlkes, J. Brian
Chakrabarti, Chaitali
Wenisch, Thomas F.
IEEE TRANSACTIONS ON COMPUTERS, 2020, 69 (08) : 1209 - 1220
[38] Co-\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$Z$$\end{document} ECC scalar multiplications for hardware, software and hardware–software co-design on embedded systems
Brian Baldwin
Raveen R. Goundar
Mark Hamilton
William P. Marnane
Journal of Cryptographic Engineering, 2012, 2 (4) : 221 - 240
[39] Deep Learning-Based Energy-Efficient Spacing Policy and Platooning Control Co-Design for Connected and Automated Vehicles on Inclined Roads
Zhang, Hanwen
Chen, Jicheng
Zhu, Chaojie
Zhang, Hui
IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, 2024, 73 (10) : 14486 - 14498

← 1 2 3 4 →