Intellectual Property Protection of Deep-Learning Systems via Hardware/Software Co-Design

被引：1

作者：

Chen, Huili ^{[1
,5
]}

Fu, Cheng ^{[2
]}

Rouhani, Bita Darvish ^{[3
]}

Zhao, Jishen ^{[2
]}

Koushanfar, Farinaz ^{[4
]}

机构：

[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA

[2] Univ Calif San Diego, Comp Sci & Engn Dept, La Jolla, CA 92093 USA

[3] Microsoft, Redmond, WA 98052 USA

[4] Univ Calif San Diego, Elect & Comp Engn, La Jolla, CA 92093 USA

[5] Univ Calif San Diego, La Jolla, CA 92093 USA

来源：

IEEE DESIGN & TEST | 2024年 / 41卷 / 02期

关键词：

Hardware; Fingerprint recognition; Security; Watermarking; IP networks; Computational modeling; Performance evaluation; Intellectual property protection; Deep learning hardware; Attestation; Digital fingerprinting;

D O I：

10.1109/MDAT.2023.3303435

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Editor's notes: This article protects deep learning models by leveraging hardware device-specific model fingerprinting and trusted execution environment. - Gang Qu, University of Maryland, USA © 2013 IEEE.

引用

页码：23 / 31

页数：9

共 39 条

[1] A Hardware/Software Co-Design Vision for Deep Learning at the Edge
Ponzina, Flavio
Machetti, Simone
Rios, Marco
Denkinger, Benoit Walter
Levisse, Alexandre
Ansaloni, Giovanni
Peon-Quiros, Miguel
Atienza, David
IEEE MICRO, 2022, 42 (06) : 48 - 54
[2] Cerebras Architecture Deep Dive: First Look Inside the Hardware/Software Co-Design for Deep Learning
Lie, Sean
IEEE MICRO, 2023, 43 (03) : 18 - 30
[3] Deep Model Intellectual Property Protection via Deep Watermarking
Zhang, Jie
Chen, Dongdong
Liao, Jing
Zhang, Weiming
Feng, Huamin
Hua, Gang
Yu, Nenghai
IEEE TRANSACTIONS ON PATTERN ANALYSIS AND MACHINE INTELLIGENCE, 2022, 44 (08) : 4005 - 4020
[4] Conceptual Model of Hardware & Software Co-design for Multicore Systems on Chip
Ruchkin, Vladimir
Soldatov, Grigory
Koryachko, Alexei
Kostrov, Boris
Ruchkina, Ekaterina
2020 9TH MEDITERRANEAN CONFERENCE ON EMBEDDED COMPUTING (MECO), 2020, : 368 - 371
[5] Co-Z ECC scalar multiplications for hardware, software and hardware-software co-design on embedded systems
Baldwin, Brian
Goundar, Raveen R.
Hamilton, Mark
Marnane, William P.
JOURNAL OF CRYPTOGRAPHIC ENGINEERING, 2012, 2 (04) : 221 - 240
[6] A Practical Multiobjective Learning Framework for Optimal Hardware–Software Co-Design of Control-on-a-Chip Systems
Chan, Kimberly J.
Paulson, Joel A.
Mesbah, Ali
IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, 2024, 32 (06) : 2178 - 2193
[7] Systemization of Knowledge: Robust Deep Learning using Hardware-software co-design in Centralized and Federated Settings
Zhang, Ruisi
Hussain, Shehzeen
Chen, Huili
Javaheripi, Mojan
Koushanfar, Farinaz
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2023, 28 (06)
[8] VLSI realization of learning vector quantization with hardware/software co-design for different applications
An, Fengwei
Akazawa, Toshinobu
Yamasaki, Shogo
Chen, Lei
Mattausch, Hans Juergen
JAPANESE JOURNAL OF APPLIED PHYSICS, 2015, 54 (04)
[9] Hardware/software co-design for RSVP-TE MPLS
Peterkin, Raymond
Ionescu, Dan
2006 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, VOLS 1-5, 2006, : 2227 - +
[10] Hardware-Software Co-Design Framework for Data Encryption in Image Processing Systems for the Internet of Things Environment
Lata, Kusum
Chhabra, Surbhi
Saini, Sandeep
IEEE CONSUMER ELECTRONICS MAGAZINE, 2022, 11 (04) : 92 - 97

← 1 2 3 4 →