A 6.435-nW, 26.2-ppm/°C hybrid bandgap reference with stacked ΔVGS compensation in sub-threshold region

This paper illustrates a methodology to design an ultra-low power hybrid bandgap reference (HBR) with high accuracy to counteract the effect of temperature using single BJT and MOSFETs working in subthreshold region. Based on compensated V-BE and Delta V-th, the study provides a new insight into compensation of complementary-toabsolute-temperature (CTAT) voltage with a nano-watt proportional-to-absolute-temperature (PTAT) voltage generator with reduced threshold voltage-induced process variation. Designed in a 180 nm CMOS process, the circuit has a measured temperature coefficient of 26.2 ppm/degrees C with a wide temperature range of 40 degrees C similar to 125 degrees C and an overall variation coefficient of 0.234% among 9 chips with an active area of 0.0264 mm(2). The experimental result shows that the proposed HBR circuit can operate with a supply voltage down