Ultra-low Power Current Comparator*

In this paper, we propose an ultra-low power current comparator suitable for low-frequency to medium frequency applications with a stringent power budget. The circuit uses diode-connected transistors and feedback judicially to reduce the power dissipation significantly with a minimal increase in delay. As a result, the overall power-delay product (i.e., figure of merit - FoM) of the proposed current comparator is better than that in existing current comparators. For a fair comparison, the proposed and existing designs are simulated in TSMC 180 nm technology with 1.8 V supply voltage. The power dissipation of the proposed comparator is 168 nW at 1 MHz signal frequency with 100 nA signal amplitude. As a result, the FoM of the proposed comparator is 2.78 fW-sec which is at least 2.8 times improved compared to the better existing comparator available in the literature.