VLSI Architecture of DCT-Based Harmonic Wavelet Transform for Time-Frequency Analysis

被引:3
作者
Khatua, Pritiranjan [1 ]
Ray, Kailash Chandra [1 ]
机构
[1] Indian Inst Technol Patna, Dept Elect Engn, Patna 801106, Bihar, India
关键词
Harmonic analysis; Wavelet transforms; Discrete cosine transforms; Transforms; Time-frequency analysis; Discrete Fourier transforms; Wavelet analysis; Complex harmonic wavelet (CHW); discrete cosine transform (DCT)-II-based harmonic wavelet; field programmable gate array (FPGA) prototype; spectral leakage; time-frequency analysis; VLSI architecture; SIGNAL; BIAS;
D O I
10.1109/TIM.2023.3259023
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The complex harmonic wavelet (CHW) is being used to directly compute frequency content with respect to time by employing discrete Fourier transform (DFT) and inverse DFT (IDFT). However, DFT coefficients suffer severe leakage of energy from one band to another band of frequency. The leakage between bands is minimized by employing discrete cosine transform (DCT) in the harmonic wavelet transform (HWT), which leads to a better representation of the time-frequency spectrum. This article introduces a new VLSI architecture for DCT -based harmonic wavelet for hardware implementation and prototyped on a commercially available virtex5 field-programmable gate array (FPGA) (xc5vlx110t). To validate the proposed implementation, its real-time captured results in the logic analyzer are verified with simulation results. The maximum operating frequency targeting the FPGA mentioned above device is reported as 114.34 MHz. The total ON-chip power of the above implementation is 1.102 W, out of which 68 mW is the dynamic power dissipation at a toggle rate of 12%. Finally, for the area utilization of the above implementation, its resource utilization targeting the above FPGA device is reported.
引用
收藏
页数:8
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