Analysis of Integration Technologies for High-Speed Analog Neuromorphic Photonics

被引:5
作者
De Marinis, Lorenzo [1 ]
Andriolli, Nicola [2 ]
Contestabile, Giampiero [1 ]
机构
[1] Scuola Super Sant Anna, I-56127 Pisa, PI, Italy
[2] CNR IEIIT, I-56122 Pisa, Italy
关键词
Photonics; Program processors; Laser noise; Power lasers; Optical distortion; Hardware; Computer architecture; Photonic analog computing; photonic neural networks; photonic integration technologies; MODULATOR;
D O I
10.1109/JSTQE.2023.3273784
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
While the use of graphic processing units fueled the success of artificial intelligence models, their future evolution will likely require overcoming the speed and energy efficiency limitations of current implementations with the use of specialized neuromorphic hardware. In this scenario, neuromorphic photonic processors have recently proved to be a feasible solution. In this paper, we first discuss basic analog photonic processing elements based on Mach-Zehnder modulators and assess their effective bit resolution. Then we evaluate how different photonic integration technologies affect the performance and the scalability of analog optical processors, in order to provide a clearer path toward real-world implementations of such engines. To this aim, we focus our analysis on the silicon on insulator (SOI), lithium niobate on insulator (LNOI), and indium phosphide (InP) platforms. In particular, we have numerically evaluated the performance of the Photonic Electronic Multiply- Accumulate Neuron (PEMAN) and its tensorial version, both based on Mach-Zehnder modulators, with the three technologies in terms of resolution, energy efficiency, and footprint efficiency. LNOI modulators achieve the best resolution at high speed, with 4.3 bits at 56 GMAC/s for the single PEMAN and 3.6 bits at 224 GMAC/S for the tensorial version. The energy consumption in InP and LNOI platforms is the lowest, accounting for just 13.2 pJ/MAC and 4.6 pJ/MAC for the single and tensorial PEMAN, respectively. Nonetheless, SOI devices outperform the others in terms of footprint efficiency, reaching 18.6 GMAC/s/mm 2 in the single-neuron version and 29.6 GMAC/s/mm 2 in the tensorial version.
引用
收藏
页数:9
相关论文
共 50 条
[31]   Materials for ultra-efficient, high-speed optoelectronics [J].
Galan Moody ;
M. Saif Islam .
MRS Bulletin, 2022, 47 :475-484
[32]   High-speed compact folded Michelson interferometer modulator [J].
Song, Ruogu ;
Sun, Jialiang ;
Wang, Jinyu ;
Li, Xinyu ;
Liu, Yufei ;
Yue, Wencheng ;
Cai, Yan ;
Wang, Shuxiao ;
Yu, Mingbin .
OPTICS EXPRESS, 2022, 30 (13) :23704-23715
[33]   PIPED: A Silicon-Plasmonic High-Speed Photodetector [J].
Freude, W. ;
Muehlbrandt, S. ;
Harter, T. ;
Melikyan, A. ;
Koehnle, K. ;
Muslija, A. ;
Vincze, P. ;
Wolf, S. ;
Jakobs, P. ;
Fedoryshyn, Y. ;
Leuthold, J. ;
Kohl, M. ;
Zwick, T. ;
Randel, S. ;
Koos, C. .
2017 19TH INTERNATIONAL CONFERENCE ON TRANSPARENT OPTICAL NETWORKS (ICTON), 2017,
[34]   High-Speed Memristive Ternary Content Addressable Memory [J].
Gnawali, Krishna P. ;
Tragoudas, Spyros .
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2022, 10 (03) :1349-1360
[35]   High-speed Si-Ge avalanche photodiodes [J].
Wang, Binhao ;
Mu, Jifang .
PHOTONIX, 2022, 3 (01)
[36]   High-speed plasmonic modulator in a single metal layer [J].
Ayata, Masafumi ;
Fedoryshyn, Yuriy ;
Heni, Wolfgang ;
Baeuerle, Benedikt ;
Josten, Arne ;
Zahner, Marco ;
Koch, Ueli ;
Salamin, Yannick ;
Hoessbacher, Claudia ;
Haffner, Christian ;
Elder, Delwin L. ;
Dalton, Larry R. ;
Leuthold, Juerg .
SCIENCE, 2017, 358 (6363) :630-632
[37]   High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber [J].
Dang, Viet Ba ;
Mohajerani, Kamyar ;
Gaj, Kris .
IEEE TRANSACTIONS ON COMPUTERS, 2023, 72 (02) :306-320
[38]   Numerical Analysis for High-Speed Hybrid- Modulation Semiconductor Laser Integrated With Passive Waveguide [J].
Yasaka, Hiroshi ;
Yokota, Nobuhide ;
Shindo, Takahiko ;
Kobayashi, Wataru .
IEEE JOURNAL OF QUANTUM ELECTRONICS, 2024, 60 (04)
[39]   Analysis and Optimization Strategies Toward Reliable and High-Speed 6T Compute SRAM [J].
Chen, Jian ;
Zhao, Wenfeng ;
Wang, Yuqi ;
Ha, Yajun .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2021, 68 (04) :1520-1531
[40]   Design of Very High-Speed Pipeline FIR Filter Through Precise Critical Path Analysis [J].
Cho, Su Min ;
Meher, Pramod Kumar ;
Luong Tran Nhat Trung ;
Cho, Hyo Jin ;
Park, Sang Yoon .
IEEE ACCESS, 2021, 9 :34722-34735