Neuroevolution-Based Network Architecture Evolution in Semiconductor Manufacturing

Promoted model architectures or algorithms are crucial for intelligentmanufacturing since developing them takes a lot of trial and errorto embed the domain knowledge into the models correctly. Especiallyin semiconductor manufacturing, the whole processes depend on complicatedphysical equations and sophisticated fine-tuning. Therefore, we usea neuroevolution-based model to search the optimized architectureautomatically. The collector current value at a particular bias ofthe silicon-germanium (SiGe) heterojunction bipolar transistor,generated by technology computer-aided design (TCAD), is used as thetarget dataset with six process parameters as the inputs. The processesinclude oxidation, dry and wet etching, implantation, annealing, diffusion,and chemical-mechanical polishing. Our work can build a suitablemodel network with a fast turnaround time, and practical physicalconstraints are fused in it without domain knowledge extraction. Takethe case with 3840 data and one output as an instance. The mean squareerrors of the train set and validation set, as well as the mean absolutepercentage error of the test set, are 1.317 x 10(-6), 7.215 x 10(-7), and 0.216 while using multilayerperceptron (MLP) and they are 3.285 x 10(-7),1.661 x 10(-7), and 0.097 while using NE. Theconsequences show that the work in this vein is promising. Accordingto the trend plot and results, the ability to extract physic is muchbetter than the traditional (MLP) model.