ZuSE-KI-AVF: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving

被引：7

作者：

Thieu, Gia Bao ^{[1
]}

Gesper, Sven ^{[1
]}

Paya-Vaya, Guillermo ^{[1
]}

Riggers, Christoph ^{[2
]}

Renke, Oliver ^{[2
]}

Fiedler, Till ^{[2
]}

Marten, Jakob ^{[2
]}

Stuckenberg, Tobias ^{[2
]}

Blume, Holger ^{[2
]}

Weis, Christian ^{[3
]}

Steiner, Lukas ^{[3
]}

Sudarshan, Chirag ^{[3
]}

Wehn, Norbert ^{[3
]}

Reimann, Lennart M. ^{[4
]}

Leupers, Rainer ^{[4
]}

Beyer, Michael ^{[5
]}

Koehler, Daniel ^{[5
]}

Jauch, Alisa ^{[5
]}

Borrmann, Jan Micha ^{[5
]}

Jaberansari, Setareh ^{[5
]}

Berthold, Tim ^{[6
]}

Blawat, Meinolf ^{[6
]}

Kock, Markus ^{[6
]}

Schewior, Gregor ^{[6
]}

Benndorf, Jens ^{[6
]}

Kautz, Frederik ^{[7
]}

Bluethgen, Hans-Martin ^{[7
]}

Sauer, Christian ^{[7
]}

机构：

[1] Tech Univ Carolo Wilhelmina Braunschweig, Chair Chip Design Embedded Comp, Braunschweig, Germany

[2] Leibniz Univ Hannover, Inst Microelect Syst, Hannover, Germany

[3] Tech Univ Kaiserslautern, Microelect Syst Design Res Grp, Kaiserslautern, Germany

[4] Rhein Westfal TH Aachen, Inst Commun Technol & Embedded Syst, Aachen, Germany

[5] Robert Bosch GmbH, Gerlingen, Germany

[6] Dream Chip Technol GmbH, Garbsen, Germany

[7] Cadence Design Syst, Feldkirchen, Germany

来源：

2023 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, DATE | 2023年

关键词：

RISC-V; vertical vector processor; hardware-software system; AI acceleration; sensor processing; FPGA; ASIC;

D O I：

10.23919/DATE56975.2023.10136978

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Modern and future AI-based automotive applications, such as autonomous driving, require the efficient real-time processing of huge amounts of data from different sensors, like camera, radar, and LiDAR. In the ZuSE-KI-AVF project, multiple university, and industry partners collaborate to develop a novel massive parallel processor architecture, based on a customized RISC-V host processor, and an efficient high-performance vertical vector coprocessor. In addition, a software development framework is also provided to efficiently program AI-based sensor processing applications. The proposed processor system was verified and evaluated on a state-of-the-art UltraScale+ FPGA board, reaching a processing performance of up to 126.9 FPS, while executing the YOLO-LITE CNN on 224x224 input images. Further optimizations of the FPGA design and the realization of the processor system on a 22nm FDSOI CMOS technology are planned.

引用

页数：6

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