Exploiting Non-Volatile Memories to Improve Reliability of Processing Element for Railway Electronic Safety Systems

被引:0
作者
Eom, Young-Sik [2 ]
Kim, Chul-Su [3 ]
Choi, Juhee [1 ]
机构
[1] Sangmyung Univ, Dept Smart Informat Commun Engn, Cheonan, South Korea
[2] Samsung Elect, 1 Samsungjeonja ro, Hwaseong, Rondonia, South Korea
[3] Korea Natl Univ Transportat, Sch Railroad Engn, Uiwang 16106, Gyeonggi, South Korea
关键词
Soft Errors; Railway System; Non-Volatile Memory; Railway Safety; PERFORMANCE; DESIGN;
D O I
10.1007/s42835-022-01370-2
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The tolerance of soft errors is vital for safety related electronic systems used especially in railways as defined by EN 50,129. With evolution of fabrication technology, the probability of this problem also increased due to aggressive scaling down of the channel length of transistors. Non-volatile memories (NVMs) are considered as a part of the solution because their cells are immune against soft errors without any extra software intervention. However, there is a critical problem to replace SRAM or DRAM with NVM because of the limited write endurance. Each cell is worn out when the number of modifications exceeds the threshold. To improve the lifetime of an NVM-based memory system, we propose herein a small value encoding scheme to reduce the number of write operations. A new array, which is called encoded value array (EVA), was added beside the traditional cache structure. The EVA fills the gap between the stored data in the data array and the original data. When the gap value is small, it is written instead of updating the whole cache data to reduce the write counts. The experimental results showed that our approach increased the lifetime by 7.32 times on average.
引用
收藏
页码:3301 / 3309
页数:9
相关论文
共 31 条
  • [1] Prediction Hybrid Cache: An Energy-Efficient STT-RAM Cache Architecture
    Ahn, Junwhan
    Yoo, Sungjoo
    Choi, Kiyoung
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 2016, 65 (03) : 940 - 951
  • [2] Resistive Random Access Memory (ReRAM) Based on Metal Oxides
    Akinaga, Hiroyuki
    Shima, Hisashi
    [J]. PROCEEDINGS OF THE IEEE, 2010, 98 (12) : 2237 - 2251
  • [3] Binkert Nathan, 2011, Computer Architecture News, V39, P1, DOI 10.1145/2024716.2024718
  • [4] Artifact Detection in Endoscopic Video with Deep Convolutional Neural Networks
    Zhang, Chenxi
    Zhang, Ning
    Wang, Dechun
    Cao, Yu
    Liu, Benyuan
    [J]. 2020 SECOND INTERNATIONAL CONFERENCE ON TRANSDISCIPLINARY AI (TRANSAI 2020), 2020, : 1 - 8
  • [5] Improving Energy Efficiency and Lifetime of Phase Change Memory using Delta Value Indicator
    Choi, Ju Hee
    Kwak, Jong Wook
    [J]. JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16 (03) : 330 - 338
  • [6] Duan GS, 2014, DES AUT TEST EUROPE
  • [7] EN B, 2018, BSI STANDARDS PUBLIC
  • [8] Eom YS, 2022, INT C ELECT FACILITI, P78
  • [9] Phase change memory applications: the history, the present and the future
    Fantini, Paolo
    [J]. JOURNAL OF PHYSICS D-APPLIED PHYSICS, 2020, 53 (28)
  • [10] Ferreira AP, 2010, DES AUT TEST EUROPE, P914