Comprehensive Investigation of Gate Oxide Instability in 4H-SiC MOSFETs and MOS Capacitors Under High Gate Bias Stress

In this article, gate oxide instability of 4HSiC MOSFETs along with the n-type junction field effect transistor (JFET) and p-type channel capacitors fabricated under identical manufacturing process and thermal budget is simultaneously investigated under high gate bias stress. The degradation phenomena and the corresponding trapping mechanism of the three kinds of devices are comprehensively analyzed and compared with each other. Notably, the amount of charge injected into the gate oxide (Q(s)) is used as a criterion to evaluate the shift of threshold voltage (V-TH) and flat-band voltage (V-FB) during stress. The measured ?V-TH in 4H-SiC MOSFETs shows a strong linear relationship with Q(s), regardless of the value and polarity of the applied E-OX, whereas ?V-FB in capacitors is with a distinct behavior, demonstrating obvious saturation at high Q(s) and a significant difference under various stress condition. All these results provide deeper insight into the study of gate oxide instability in 4H-SiC MOS devices.