In this work, an engineered submicrometerscale bilayer stacking in via-type one-time programmable (OTP) memory and self-rectified resistive switching memory [resistive random access memory (ReRAM)] is demonstrated. The current development has achieved that co-existing memory functionality (OTP and ReRAM) with mitigating scaling requirement (fuse voltage trending with via size scaling), low fabrication complexity [viafuse vs. gate-dielectric anti-fuse (AF)], and match with the current metal fuse technology (> 2 V). In addition, an electrode engineered has been proposed to realize low programming voltage (similar to 1.9 V) in via-fuse OTP featuring by metal-insulator-metal advanced back-end-of-line (BEOL) process with ruthenium materials. The impact of via-size, programming window, stacked structures, and integration capability has been extensively studied. Our results provide a pathfinding of high density, integration capability, low programming voltage, multifunctionality between programmable read-only memory (PROM), and resistive switching memory co-existing in future embedded applications.