FPGA Implementation of Parameter-Switching Scheme to Stabilize Chaos in Fractional Spherical Systems and Usage in Secure Image Transmission

被引:4
作者
Adeyemi, Vincent-Ademola [1 ]
Tlelo-Cuautle, Esteban [2 ]
Sandoval-Ibarra, Yuma [3 ]
Nunez-Perez, Jose-Cruz [1 ]
机构
[1] Inst Politecn Nacl, CITEDI, Tijuana 22435, Mexico
[2] Inst Nacl Astrofis Opt & Elect INAOE, Cholula 72840, Mexico
[3] UPLC Univ Politecn Lazaro Cardenas, Dept Posgrad, Lazaro Cardenas 60950, Mexico
关键词
chaos; encryption; fractional order; FPGA; image transmission; parameter switching; synchronization; UNSTABLE PERIODIC-ORBITS; HARDWARE IMPLEMENTATION; ALGORITHM; CIRCUIT; DESIGN;
D O I
10.3390/fractalfract7060440
中图分类号
O1 [数学];
学科分类号
0701 ; 070101 ;
摘要
The main objective of this work was to implement the parameter-switching chaos control scheme for fractional-order spherical systems and develop a chaos-based image encryption and transmission system. The novelty in the developed secure communication system is the application of the parameter-switching scheme in the decryption of RGB and grayscale images, which undergo one round of encryption using the chaotic states of the fractional system and a diffusion process. The secure communication system has a synchronized master and slave topology, resulting in transmitter and receiver systems for encrypting and decrypting images, respectively. This work was demonstrated numerically and also implemented on two FPGAs, namely Artix-7 AC701 and Cyclone V. The results show that the parameter-switching scheme controls chaos in the fractional-order spherical systems effectively. Furthermore, the performance analysis of the image encryption and transmission system shows that there is no similarity between the original and encrypted images, while the decryption of the encrypted images is without a loss of quality. The best result in terms of the encryption was obtained from the chaotic state x of the fractional-order system, with correlation coefficients of 0.0511 and 0.0392 for the RGB and grayscale images, respectively. Finally, the utilization of the FPGA logical resources shows that the implementation on Artix-7 AC701 is more logic-efficient than on Cyclone V.
引用
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页数:31
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