A New Cascaded H-bridge Multilevel Inverter Using Sinusoidal Pulse Width Modulation

被引:0
作者
Revathi, M. [1 ]
Sudha, K. Rama [1 ]
机构
[1] Andhra Univ, Coll Engn A, Dept Elect Engn, Visakhapatnam, Andhra Pradesh, India
来源
INTERNATIONAL CONFERENCE ON INNOVATIVE COMPUTING AND COMMUNICATIONS, ICICC 2022, VOL 1 | 2023年 / 473卷
关键词
D O I
10.1007/978-981-19-2821-5_22
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The utilization of multilevel inverter since the last decade has been increased. Due to the ability of these novel inverters to synthesize, the waveforms with better harmonic profile and output are used in number of high voltage and high power applications This paper depicts an asymmetrical 23-level multilevel inverter, using sinusoidal pulse width modulation technique. With increased steps in output voltage, the total harmonic distortion (THD) is reduced. This topology is anticipated to get 23 levels. Simulation results are shown and compared with theoretical results. This topology is proposed to give more number of levels with minimum possible switches, which is more efficient.
引用
收藏
页码:261 / 268
页数:8
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