Demonstration of recycling process for GaN substrates using laser slicing technique towards cost reduction of GaN vertical power MOSFETs

被引：0

作者：

Ishida, Takashi ^{[1
]}

Ushijima, Takashi ^{[1
]}

Nakabayashi, Shosuke ^{[1
]}

Kato, Kozo ^{[1
]}

Koyama, Takayuki ^{[1
]}

Nagasato, Yoshitaka ^{[1
,2
]}

Ohara, Junji ^{[1
]}

Hoshi, Shinichi ^{[1
]}

Nagaya, Masatake ^{[1
]}

Hara, Kazukuni ^{[1
]}

Kanemura, Takashi ^{[1
]}

Taki, Masato ^{[1
]}

Yui, Toshiki ^{[3
]}

Hara, Keisuke ^{[3
]}

Kawaguchi, Daisuke ^{[3
]}

Kuno, Koji ^{[3
]}

Osajima, Tetsuya ^{[3
]}

Kojima, Jun ^{[1
,2
]}

Uesugi, Tsutomu ^{[2
]}

Tanaka, Atsushi ^{[2
]}

Sasaoka, Chiaki ^{[2
]}

Onda, Shoichi ^{[1
,2
]}

Suda, Jun ^{[2
]}

机构：

[1] MIRISE Technol, Toyota, Aichi 4700309, Japan

[2] Nagoya Univ, Nagoya, Aichi 4648601, Japan

[3] Hamamatsu Photon KK, Iwata, Shizuoka 4380193, Japan

来源：

APPLIED PHYSICS EXPRESS | 2024年 / 17卷 / 02期

关键词：

GaN substrate; recycling process; laser slicing; cost reduction; power device; TRANSISTORS;

D O I：

10.35848/1882-0786/ad269d

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

To address the issue of the high cost of GaN substrates, a recycling process for GaN substrates using a laser slicing technique was investigated. The channel properties of lateral MOSFETs and the reverse characteristics of vertical PN diodes, which represent the main components of vertical power devices, exhibited no degradation either before and after laser slicing or due to the overall GaN substrate recycling process. This result indicates that the proposed recycling process is an effective method for reducing the cost of GaN substrates and has the potential to encourage the popularization of GaN vertical power devices.

引用

页数：5

共 39 条

[1] Binder A. T., 2023, Adv. Electr. Eng. Electron. Energy, V5, DOI [10.1016/j.prime.2023.100218, DOI 10.1016/J.PRIME.2023.100218]
[2] Chow TP, 2015, WIPDA 2015 3RD IEEE WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS, P402, DOI 10.1109/WiPDA.2015.7369328
[3] First Demonstration of AlSiO as Gate Dielectric in GaN FETs; Applied to a High Performance OG-FET
Gupta, Chirag
Chan, Silvia H.
Agarwal, Anchal
Hatui, Nirupam
Keller, Stacia
Mishra, Umesh K.
[J]. IEEE ELECTRON DEVICE LETTERS, 2017, 38 (11) : 1575 - 1578
[4] Comparison of switching performance of high-speed GaN vertical MOSFETs with various gate structures based on TCAD simulation
Ishida, Takashi
Kachi, Tetsu
Suda, Jun
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2023, 62 (01)
[5] Impact of channel mobility on design optimization of 600-3300 V-class high-speed GaN vertical-trench MOSFETs based on TCAD simulation
Ishida, Takashi
Sakao, Keisuke
Kachi, Tetsu
Suda, Jun
[J]. APPLIED PHYSICS EXPRESS, 2021, 14 (09)
[6] Improvement of channel property of GaN vertical trench MOSFET by compensating nitrogen vacancies with nitrogen plasma treatment
Ishida, Takashi
Nam, Kyung Pil
Matys, Maciej
Uesugi, Tsutomu
Suda, Jun
Kachi, Tetsu
[J]. APPLIED PHYSICS EXPRESS, 2020, 13 (12)
[7] Over 200 cm2 V-1 s-1 of electron inversion channel mobility for AlSiO/GaN MOSFET with nitrided interface
Ito, Kenji
Iwasaki, Shiro
Tomita, Kazuyoshi
Kano, Emi
Ikarashi, Nobuyuki
Kataoka, Keita
Kikuta, Daigo
Narita, Tetsuo
[J]. APPLIED PHYSICS EXPRESS, 2023, 16 (07)
[8] Improved Dynamic RON of GaN Vertical Trench MOSFETs (OG-FETs) Using TMAH Wet Etch
Ji, Dong
Li, Wenwen
Agarwal, Anchal
Chan, Silvia H.
Haller, Jeffrey
Bisi, Davide
Labrecque, Michelle
Gupta, Chirag
Cruse, Bill
Lal, Rakesh
Keller, Stacia
Mishra, Umesh K.
Chowdhury, Srabanti
[J]. IEEE ELECTRON DEVICE LETTERS, 2018, 39 (07) : 1030 - 1033
[9] 880 V/2.7 mΩ . cm2 MIS Gate Trench CAVET on Bulk GaN Substrates
Ji, Dong
Agarwal, Anchal
Li, Haoran
Li, Wenwen
Keller, Stacia
Chowdhury, Srabanti
[J]. IEEE ELECTRON DEVICE LETTERS, 2018, 39 (06) : 863 - 865
[10] Recent progress of GaN power devices for automotive applications
Kachi, Tetsu
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2014, 53 (10)

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