Design of Scalable Superconducting Quantum Circuits Using Flip-Chip Assembly

被引:0
|
作者
Park, Seong Hyeon [1 ]
Baek, Dowon [2 ]
Park, Insung [3 ]
Hahn, Seungyong [1 ]
机构
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul, South Korea
[2] Seoul Natl Univ, Dept Phys & Astron, Seoul 08826, South Korea
[3] Korea Electrotechnol Res Inst, Gyeongsangnam Do 51543, South Korea
基金
新加坡国家研究基金会;
关键词
Flip-chip; multi-qubit; quantum computer; transmon qubit;
D O I
10.1109/TASC.2023.3244142
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We present design results of scalable superconducting quantum circuits using the flip-chip assembly. In order to achieve the longest relaxation time (T-1) of a qubit possible, gap between two chips in flip-chip assembly is determined to be 12 mu m where low surface dielectric loss from two-level system (TLS) defects can be achieved while maintaining large readout coupling strength between two chips in the flip-chip assembly. Superconducting transmon qubit design is then optimized to have a target anharmonicity of 200 MHz and to have the longer T-1 in consideration of surface energy participation ratios of TLS defects within the compact footprint. To achieve strong coupling strength but low qubit to qubit crosstalk (ZZ) for fast and high fidelity multi-qubit gates, direct coupler and compact multi-path coupler designs for coupling qubits are compared by numerically solving Hamiltonian of the coupled two qubits. Monte-Carlo simulation results on the yield rate of the extended circuits indicate that lowmanufacturing errors are required.
引用
收藏
页数:6
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