Mitigating Inter-Chip Oscillation of paralleled SiC MOSFETs

被引：0

作者：

Sawallich, Florian ^{[1
]}

Eckel, Hans-Guenter ^{[1
]}

机构：

[1] Univ Rostock, Albert Einstein Str 2, D-18059 Rostock, Germany

来源：

2023 25TH EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS, EPE'23 ECCE EUROPE | 2023年

关键词：

SiC Mosfet; SiC oscillation; Paralleling; Stability analysis; Design optimization;

D O I：

暂无

中图分类号：

TE [石油、天然气工业]; TK [能源与动力工程];

学科分类号：

0807 ; 0820 ;

摘要：

In certain parasitic conditions, self-excited oscillation of paralleled SiC MOSFETs can occur. This kind of oscillation is known as inter-chip oscillation and can lead to loss of control, resulting in device breakdown, decreased lifetime, or significantly higher EMI. This paper reveals the mechanism of inter-chip oscillation and presents effective methods for mitigation.

引用

页数：11

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