A 40 nA, 84% Efficient, PLL-based Rectifier-Less Power Switching Converter for Low-Voltage Piezoelectric Energy Harvesting

被引:1
作者
Bansal, Raghav [1 ]
Chatterjee, Shouri [1 ]
机构
[1] Indian Inst Technol Delhi, Dept Elect Engn, New Delhi 110016, India
来源
2023 21ST IEEE INTERREGIONAL NEWCAS CONFERENCE, NEWCAS | 2023年
关键词
Piezoelectric energy harvester; phase-locked loop; interface circuit; power efficiency; rectifier-less; CIRCUIT;
D O I
10.1109/NEWCAS57931.2023.10198200
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We proposed a PLL-based rectifier-less interface circuit to control the power switches for harvesting energy from a low-voltage piezoelectric transducer with input power levels of 100 nW to 40 mu W. In this proposed method, charge-pump PLL is first locked with the input frequency of the PEH to detect its peak output voltage for maximum power extraction. Once locked, power transfer occurs where PLL is operated in an open-loop (only VCO is functional) to minimize the power loss. In 180 nm CMOS technology, the power switching converter was designed and extracts power with a minimum piezoelectric open-circuit voltage of 0.17 V. At an input power of 10 mu W and a vibration frequency of 88 Hz, it achieves a maximum power efficiency of 84%. The control unit consumes an average current of 40 nA from a 1.5 V output voltage over a broad input power range.
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页数:5
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