A general purpose, low power, analog integrated image edge detector, based on a current-mode Gaussian function circuit

被引:1
作者
Gennis, Georgios [1 ]
Alimisis, Vassilis [1 ]
Dimas, Christos [1 ]
Sotiriadis, Paul Peter [1 ]
机构
[1] Natl Tech Univ Athens, Dept Elect & Comp Engn, Athens 15780, Greece
关键词
Analog integrated implementation; Bump circuits; Edge detector; Low-power design; Robert's Cross operator; SENSOR; NETWORK;
D O I
10.1007/s10470-022-02093-0
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A low power analog integrated image edge detector is proposed consisting of Gaussian function and threshold circuits. The operating principle of this architecture is based on a hardware-friendly approximation of the Robert's Cross operator. The system level implementation can be easily modified to account for various image resolutions. Therefore, the proposed architecture can be used as a building block in larger smart sensor systems. The edge detector was evaluated using 3 medium resolution images, achieving average Peak Signal-to-Noise-Ratio of 27.7 dB and Structural Similarity Index Metric of 0.81, while consuming only 33 nW per pixel. To demonstrate the performance and accuracy of the proposed architecture, Monte-carlo simulation results are provided. Both schematic and post-layout simulations are carried out in 90 nm CMOS process, using the Cadence IC suite.
引用
收藏
页码:195 / 206
页数:12
相关论文
共 34 条
  • [1] Alimisis Vassilis, 2021, 2021 International Conference on Microelectronics (ICM), P153, DOI 10.1109/ICM52667.2021.9664939
  • [2] Alimisis V., 2021, P 2021 34 SBCSBMICRO, P1
  • [3] Analog Gaussian Function Circuit: Architectures, Operating Principles and Applications
    Alimisis, Vassilis
    Gourdouparis, Marios
    Gennis, Georgios
    Dimas, Christos
    Sotiriadis, Paul P.
    [J]. ELECTRONICS, 2021, 10 (20)
  • [4] MEAN SQUARE ERROR OF PREDICTION AS A CRITERION FOR SELECTING VARIABLES
    ALLEN, DM
    [J]. TECHNOMETRICS, 1971, 13 (03) : 469 - &
  • [5] [Anonymous], 1975, Computer Graphics and Image Processing, DOI DOI 10.1016/0146-664X(75)90012-X
  • [6] THE MULTISCALE VETO MODEL - A 2-STAGE ANALOG NETWORK FOR EDGE-DETECTION AND IMAGE-RECONSTRUCTION
    DRON, L
    [J]. INTERNATIONAL JOURNAL OF COMPUTER VISION, 1993, 11 (01) : 45 - 61
  • [7] A 10 000 fps CMOS sensor with massively parallel image processing
    Dubois, Jerome
    Ginhac, Dominique
    Paindavoine, Michel
    Heyrman, Barthelemy
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (03) : 706 - 717
  • [8] Gaspariano L. A. S., ANALOG CMOS MORPHOLO
  • [9] An ultra-low power, ±0.3 V supply, fully-tunable Gaussian function circuit architecture for radial-basis functions analog hardware implementation
    Gourdouparis, Marios
    Alimisis, Vassilis
    Dimas, Christos
    Sotiriadis, Paul P.
    [J]. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2021, 136 (136)
  • [10] Scope of validity of PSNR in image/video quality assessment
    Huynh-Thu, Q.
    Ghanbari, M.
    [J]. ELECTRONICS LETTERS, 2008, 44 (13) : 800 - U35