CMOS readout FEE based TV-BLR module for CdZnTe pixel detectors in high count rate applications

被引:2
作者
Hertz, Pancha Y.
Jerome, Folla K. [1 ]
Vanessa, Noumbissi S. L.
Evariste, Wembe T. [2 ]
Bernard, Essimbi Z. [1 ]
Bhuiyan, Mohammad Arif Sobhan [3 ]
Minhad, Khairun Nisa' [3 ]
机构
[1] Univ Yaounde I, Dept Phys, Lab Energy Elect & Elect Syst, POB 812, Yaounde, Cameroon
[2] Univ Douala, Dept Phys, Lab Elect, POB 2701, Douala, Cameroon
[3] Xiamen Univ Malaysia, Sch Elect Engn & Artificial Intelligence, Sepang 43900, Selangor, Malaysia
关键词
Baseline restorer; PET; PVT; SPECT; Time-over-Threshold; and TV-BLR; 65 NM CMOS; LOW-NOISE; TECHNOLOGY; BANDWIDTH; DESIGN; TIME;
D O I
10.1016/j.asej.2023.102303
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this study, a time-variant baseline restorer (TV-BLR) circuit was designed and implemented to address the poor frequency selectivity issue in the shaping units of most state-of-the-art readout electronics for CdZnTe/CdTe detectors used in biomedical imaging applications. The proposed circuit improves image quality by canceling the artifacts that result from poor temporal and energy resolution in PET imaging. The proposed circuit consists of a Charge Sensitive Preamplifier (CSP) followed by a classical pole-zero compensation circuit. Two stages of integrators are added and a frequency rectifier module named the TV-BLR circuit has been built. The open-loop amplifier for the CSP is a single-ended input stage amplifier, designed for low-power applications with a maximum power consumption of 43 lW from a 1.2 V supply voltage, verified through post-layout Monte Carlo simulations. The TV-BLR increases the selectivity of the shaping filter, lowers the equivalent noise charge (ENC), and restores the baseline of the circuit to only 143 lV dc-offset. It also extends the counting rate behavior of the system by handling the time-overthreshold (ToT), which depends on the tail current (Itail) of the comparator stage. The circuit was designed, simulated, and validated for an input dynamic of 2-12.5fC, providing an energy range of 55.1-354.3 keV. The design has a charge-to-voltage conversion factor of 56.7 mV/fC with a 4% nonlinearity error for an input detector capacitance of 200 fF, while achieving an optimal ENC of 57.4 e - RMS +/- 0.1 e-/fC with 13.27 ns peaking time. Process Voltage Temperature (PVT) analysis was performed to validate the simulation results and performance metrics of the design. The proposed design improves energy resolution and avoids energy losses due to the readout system. (c) 2023 THE AUTHORS. Published by Elsevier BV on behalf of Faculty of Engineering, Ain Shams University This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-ncnd/4.0/).
引用
收藏
页数:12
相关论文
共 35 条
[1]   Room-temperature X-ray response of cadmium-zinc-telluride pixel detectors grown by the vertical Bridgman technique [J].
Abbene, Leonardo ;
Principato, Fabio ;
Gerardi, Gaetano ;
Buttacavoli, Antonino ;
Cascio, Donato ;
Bettelli, Manuele ;
Amade, Nicola Sarzi ;
Seller, Paul ;
Veale, Matthew C. ;
Fox, Oliver ;
Sawhney, Kawal ;
Zanettini, Silvia ;
Tomarchio, Elio ;
Zappettini, Andrea .
JOURNAL OF SYNCHROTRON RADIATION, 2020, 27 :319-328
[2]  
Alessandro C., 2018, POS TWEPP 17, P31
[3]   Review of hybrid pixel detector readout ASICs for spectroscopic X-ray imaging [J].
Ballabriga, R. ;
Alozy, J. ;
Campbell, M. ;
Frojdh, E. ;
Heijne, E. H. M. ;
Koenig, T. ;
Llopart, X. ;
Marchal, J. ;
Pennicard, D. ;
Poikela, T. ;
Tlustos, L. ;
Valerio, P. ;
Wong, W. ;
Zuber, M. .
JOURNAL OF INSTRUMENTATION, 2016, 11
[4]  
Celani A, 2010, IEEE NUCL SCI CONF R, P1382, DOI 10.1109/NSSMIC.2010.5873997
[5]   8-channel CMOS preamplifier and shaper with adjustable peaking time and automatic pole-zero cancellation [J].
Chase, RL ;
Hrisoho, A ;
Richer, JP .
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 1998, 409 (1-3) :328-331
[6]   Stability of the Baseline Holder in Readout Circuits for Radiation Detectors [J].
Chen, Y. ;
Cui, Y. ;
O'Connor, P. ;
Seo, Y. ;
Camarda, G. S. ;
Hossain, A. ;
Roy, U. ;
Yang, G. ;
James, R. B. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2016, 63 (01) :316-324
[7]   The Impact of Microelectronics on High Energy Physics Innovation: The Role of 65 nm CMOS Technology on New Generation Particle Detectors [J].
Demaria, N. .
FRONTIERS IN PHYSICS, 2021, 9
[8]   CHIPIX65: developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments [J].
Demaria, N. ;
Dellacasa, G. ;
Mazza, G. ;
Rivetti, A. ;
Rolo, M. D. Da Rocha ;
Monteil, E. ;
Pacher, L. ;
Ciciriello, F. ;
Corsi, F. ;
Marzocca, C. ;
De Robertis, G. ;
Loddo, F. ;
Tamma, C. ;
Bagatin, M. ;
Bisello, D. ;
Gerardin, S. ;
Mattiazzo, S. ;
Ding, L. ;
Giubilato, P. ;
Paccagnella, A. ;
De Canio, E. ;
Gaioni, L. ;
Manghisoni, M. ;
Re, V. ;
Traversi, G. ;
Riceputi, E. ;
Ratti, L. ;
Vacchi, C. ;
Beccherle, R. ;
Magazzu, G. ;
Minuti, M. ;
Morsani, F. ;
Palla, F. ;
Liberali, V. ;
Shojaii, S. ;
Stabile, A. ;
Bilei, G. M. ;
Menichelli, M. ;
Conti, E. ;
Marconi, S. ;
Passeri, D. ;
Placidi, P. .
2015 6TH IEEE INTERNATIONAL WORKSHOP ON ADVANCES IN SENSORS AND INTERFACES (IWASI), 2015, :49-54
[9]   A low-offset low-power and high-speed dynamic latch comparator with a preamplifier-enhanced stage [J].
Folla, Jerome K. ;
Crespo, Maria L. ;
Wembe, Evariste T. ;
Bhuiyan, Mohammad A. S. ;
Cicuttin, Andres ;
Essimbi, Bernard Z. ;
Reaz, Mamun B. I. .
IET CIRCUITS DEVICES & SYSTEMS, 2021, 15 (01) :65-77
[10]   65 nm CMOS analog front-end for pixel detectors at the HL-LHC [J].
Gaioni, L. ;
De Canio, F. ;
Manghisoni, M. ;
Ratti, L. ;
Re, V. ;
Traversi, G. .
JOURNAL OF INSTRUMENTATION, 2016, 11