Optimized Design of a Variable Fractional Delay Filter With Delay Error Constraints

A novel algorithm for designing variable fractional delay (VFD) filter coefficients is proposed to improve time delay accuracy. The principle of this method is to model the coefficient design as an optimization problem with fractional delay error constraints (FDECs) and use a linear approach to derive a new FDEC expression for solving the problem. The solution of the FDEC expression can be efficiently obtained through linear programming (LP). Compared with existing algorithms, the design examples show the proposed method achieves a 100-fold improvement in delay accuracy while maintaining the frequency response (FR) error at an acceptable level, and yields a 5 dB reduction in FR error with the same level of delay accuracy.