Millimeter-Wave CMOS Low-Noise Amplifier With High Gain and Compact Footprint

For millimeter-Wave (mm-Wave) communications, this letter proposes a low-noise amplifier (LNA) topology by using gain-boosting and negative feedback techniques. In the proposed two-stage LNA, the first stage combines these two techniques to achieve a trade-off between gain and bandwidth. Following that, in the cascode structure, inductors are used to compensate for the parasitic capacitance of the transistors. To validate the proposed topology at a low cost, an mm-Wave LNA is designed and fabricated in a 180 nm CMOS process. Using two stages only, it achieves a maximum gain of 14.1 dB at 24.8 GHz, which is comparable to that of classical LNAs with three stages, and the chip footprint is reduced by 43%.