1-kS/s 12-bit SAR ADC with Burst Conversion

被引：0

作者：

Son, Haewoon ^{[1
]}

Yang, Wonseok ^{[1
]}

Jung, Hoyong ^{[1
]}

Jang, Young-Chan ^{[1
]}

机构：

[1] Kumoh Natl Inst Technol, Dept Elect Engn, Gumi, South Korea

来源：

2023 20TH INTERNATIONAL SOC DESIGN CONFERENCE, ISOCC | 2023年

关键词：

SAR ADC; leakage current of CDAC; burst conversion;

D O I：

10.1109/ISOCC59558.2023.10396006

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The proposed 1-kS/s 12-bit SAR ADC performs burst conversion to compensate for the loss of the sampled analog signal due to leakage current in the capacitors of the capacitor-based DAC. The proposed SAR ADC is implemented using a 180 nm 1-poly six-metal CMOS process with a supply of 1.8 V. The proposed burst conversion for low-speed SAR ADCs improves the dynamic performance of ENOB from 10.82 bits to 11.87 bits for an input signal width a frequency of 472.16 Hz at a sampling rate of 1 kS/s. The sleep mode operation between the burst conversions reduces the average power consumption of the SAR ADC from 38.34 uW to 9.70 uW by reducing static power consumption.

引用

页码：295 / 296

页数：2

共 3 条

[1] A 10b/12b 40 kS/s SAR ADC With Data-Driven Noise Reduction Achieving up to 10.1b ENOB at 2.2 fJ/Conversion-Step [J].

Harpe, Pieter ;

Cantatore, Eugenio ;

van Roermund, Arthur .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2013, 48 (12) :3011-3018

[2] A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications [J].

Yip, Marcus ;

Chandrakasan, Anantha P. .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2013, 48 (06) :1453-1464

[3]

Zhou H, 2015, 2015 28TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), P175, DOI 10.1109/SOCC.2015.7406935

← 1 →