100 kHz Large-Signal Bandwidth GaN-Based 10 kVA Class-D Power Amplifier With 4.8 MHz Switching Frequency

被引:10
作者
Niklaus, Pascal S. [1 ]
Kolar, Johann W. [1 ]
Bortis, Dominik [1 ]
机构
[1] Swiss Fed Inst Technol, Power Elect Syst Lab, CH-8092 Zurich, Switzerland
关键词
Switches; Power amplifiers; Voltage; Power generation; Switching frequency; Power harmonic filters; Frequency conversion; DC-AC power conversion; inverters; power amplifiers; power electronics; power system testing; power-hardware-in-the-loop; wide-bandgap (WBG) semiconductors; 3-LEVEL BUCK CONVERTER; ENVELOPE TRACKING; WAVE-FORM; INVERTER; OPTIMIZATION; TOPOLOGIES;
D O I
10.1109/TPEL.2022.3213930
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Power amplifiers (PAs) are widely used, for example, to emulate the behavior of the power grid or electric machines under critical operating conditions, to measure the impedance of the power grid, or to generate specific impedance profiles in power-hardware-in-the-loop (P-HIL) tests. To accurately emulate dynamic effects and to characterize power electronic systems featuring wide-bandgap power semiconductors, PAs with very high output voltage quality and ever higher bandwidth (BW) at full output power are required, motivating the development of ultrahigh bandwidth power amplifiers (UHBW-PAs). While linear UHBW-PAs achieve very high signal fidelity and BW, they suffer from a tremendously bad efficiency, demanding large cooling effort and resulting in uneconomical operation, particular at high power levels and/or during long-term tests. Therefore, this article investigates possibilities for a switch-mode realization of UHBW-PAs with significantly higher efficiency and power density compared to existing solutions. There are two key concepts, namely series- and parallel-interleaving of multiple switching and/or converter cells, that allow to increase the effective switching frequency relevant to output filtering without increasing the individual device switching frequency that determines the per device switching losses. This article analyzes comprehensively the advantages and disadvantages of a combination of series- and parallel-interleaving in terms of losses, volume and complexity scaling. Finally, a UHBW-PA with 10 kVA output power (single-phase), a nominal rms output voltage of 230 V, a full-power BW of 100 kHz, very high output voltage quality (third and fifth harmonic < 2.5 V and < 1.2 V, respectively), an efficiency> 95%, a power density of 25 kW/dm(3) ( 410 W/in(3)), and a switching frequency of 4.8MHzis presented. A hardware demonstrator is built and extensive measurements verify the system performance and confirm the calculation fromthe initial analyses with loss models.
引用
收藏
页码:2307 / 2326
页数:20
相关论文
共 71 条
[1]   New Figure-of-Merit Combining Semiconductor and Multi-Level Converter Properties [J].
Anderson, Jon Azurza ;
Zulauf, Grayson ;
Kolar, Johann W. ;
Deboy, Gerald .
IEEE OPEN JOURNAL OF POWER ELECTRONICS, 2020, 1 :322-338
[2]   Open-Loop Control of Modular Multilevel Converters Using Estimation of Stored Energy [J].
Angquist, Lennart ;
Antonopoulos, Antonios ;
Siemaszko, Daniel ;
Ilves, Kalle ;
Vasiladiotis, Michail ;
Nee, Hans-Peter .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2011, 47 (06) :2516-2524
[3]  
[Anonymous], 2020, GS66506T TOP SID COO
[4]  
[Anonymous], 2021, COMP CSU 200 DAT
[5]  
[Anonymous], 2021, GS66516T TOP SID COO
[6]  
[Anonymous], 2021, APS SERIES 4 QUADRAN
[7]  
[Anonymous], 2021, 7820 SERIES DATASHEE
[8]  
[Anonymous], 2022, 8500 SER
[9]  
[Anonymous], 2021, IGOT60R070D1 600V CO
[10]  
Baker R. H, 1981, U.S. Patent, Patent No. 4270163