Demonstration of p-type GaN FinFETs on Silicon Substrates with Ultrahigh Current ON/OFF Ratio of 109 and Reduced Interface Trap Density

被引:0
|
作者
Du, Hanghai [1 ]
Liu, Zhihong [1 ,2 ]
Zhang, Tao [1 ]
Hao, Lu [1 ]
Gao, Guangjie [1 ]
Xing, Weichuan [2 ]
Zhang, Jincheng [1 ,2 ]
Hao, Yue [1 ]
机构
[1] Xidian Univ, Sch Microelect, Xian 710071, Peoples R China
[2] Xidian Univ, Guangzhou Inst Technol, Guangzhou 510555, Peoples R China
来源
2023 7TH IEEE ELECTRON DEVICES TECHNOLOGY & MANUFACTURING CONFERENCE, EDTM | 2023年
关键词
GaN; p-type; FinFET; current on/off ratio; I-ON/I-OFF;
D O I
10.1109/EDTM55494.2023.10103032
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work demonstrated a high output-current density (I-D) of 33 mA/ mm and a record high drain current on/off ratio of 1 x 10(9) p-type GaN Fin Field-Effect Transistor (FinFET) based on a p-GaN/AlN/AlGaNon-Si structure. Besides, a subthreshold swing of 103 mV/dec was obtained owing to the wet pretreatment. Meanwhile, a high extrinsic transconductance of 3.4 mS/mm were acquired. The high ID and high drain current on/off ratio p-type GaN FinFET exhibits the potential to achieve matching with n-GaN transistors in all-GaN integrated circuits.
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页数:3
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